X-Git-Url: https://jxself.org/git/?p=carl9170fw.git;a=blobdiff_plain;f=carlfw%2Fcarl9170.lds;h=97dda684131a59213314018e1f5a64276bed7f08;hp=0c4ebd659d395b096142d8d78d15389498f951ae;hb=6598140e430d622be926aed43ec19fec8326cd11;hpb=e72388a0aa23da8bc8e24a0cbe9d523c5a9ce294

diff --git a/carlfw/carl9170.lds b/carlfw/carl9170.lds
index 0c4ebd6..97dda68 100644
--- a/carlfw/carl9170.lds
+++ b/carlfw/carl9170.lds
@@ -1,9 +1,9 @@
 /*
  * The carl9170 firwmare gets copied into the device's
- * Program RAM (pram), which has a size of 32K, but
+ * Program RAM (pram), which has a size of 16K, but
  * also has to accomodate the stack the device uses,
- * which starts at the top of the 32k, so we pretend
- * that we just have 16k of pram.
+ * which starts at the top of the 16k, so we pretend
+ * that we just have 16256 (16k - 128) of pram.
  *
  * This section documents some of the other areas
  * mapped into the firmware processor's address space
@@ -27,11 +27,15 @@ MEMORY
     irqctl   : ORIGIN = 0x1d2000, LENGTH = 4k
     usb      : ORIGIN = 0x1e1000, LENGTH = 4k
     pta      : ORIGIN = 0x1e2000, LENGTH = 4k
-    pram     : ORIGIN = 0x200000, LENGTH = 16k
+    pram     : ORIGIN = 0x200000, LENGTH = 16256
+    bogus    : ORIGIN = 0x300000, LENGTH = 8k
 }
 
 SECTIONS
 {
+	.eeprom : { *(.eeprom*) } > eeprom
+	.sram	: { *(.sram*) } > sram
+
 	/*
 	 * The ar9170 boot code will execute the code
 	 * at address 0x04 from the loaded firmware as
@@ -50,8 +54,6 @@ SECTIONS
 	.rodata	: { *(.rodata*) } > pram
 	.bss	: { *(.bss) } > pram
 	.data	: { *(.data*) } > pram
-	.fwdsc	: { KEEP(*(.fwdsc)) } > pram
 
-	.sram	: { *(.sram*) } > sram
-	.eeprom : { *(.eeprom*) } > eeprom
+	.fwdsc	: { KEEP(*(.fwdsc)) } > bogus
 }