carl9170 firmware: checkpatch fixes

[carl9170fw.git] / include / shared / wlan.h

diff --git a/include/shared/wlan.h b/include/shared/wlan.h
index c882ede0a3c9956dffb893a6c0a07245bb5db1c0..35e2e4f884850bfce009a3252e82b455f8f34946 100644 (file)
--- a/include/shared/wlan.h
+++ b/include/shared/wlan.h
@@ -115,26 +115,30 @@
 #define        AR9170_TX_PHY_SHORT_PREAMBLE            0x00000004
 #define        AR9170_TX_PHY_GREENFIELD                0x00000004
 
-#define        AR9170_TX_PHY_BW_SHIFT                  3
-#define        AR9170_TX_PHY_BW_MASK                   (3 << AR9170_TX_PHY_BW_SHIFT)
+#define        AR9170_TX_PHY_BW_S                      3
+#define        AR9170_TX_PHY_BW                        (3 << AR9170_TX_PHY_BW_SHIFT)
 #define        AR9170_TX_PHY_BW_20MHZ                  0
 #define        AR9170_TX_PHY_BW_40MHZ                  2
 #define        AR9170_TX_PHY_BW_40MHZ_DUP              3
 
-#define        AR9170_TX_PHY_TX_HEAVY_CLIP_SHIFT       6
-#define        AR9170_TX_PHY_TX_HEAVY_CLIP_MASK        (7 << AR9170_TX_PHY_TX_HEAVY_CLIP_SHIFT)
+#define        AR9170_TX_PHY_TX_HEAVY_CLIP_S           6
+#define        AR9170_TX_PHY_TX_HEAVY_CLIP             (7 << \
+                                                AR9170_TX_PHY_TX_HEAVY_CLIP_S)
 
-#define        AR9170_TX_PHY_TX_PWR_SHIFT              9
-#define        AR9170_TX_PHY_TX_PWR_MASK               (0x3f << AR9170_TX_PHY_TX_PWR_SHIFT)
+#define        AR9170_TX_PHY_TX_PWR_S                  9
+#define        AR9170_TX_PHY_TX_PWR                    (0x3f << \
+                                                AR9170_TX_PHY_TX_PWR_S)
 
-#define        AR9170_TX_PHY_TXCHAIN_SHIFT             15
-#define        AR9170_TX_PHY_TXCHAIN_MASK              (7 << AR9170_TX_PHY_TXCHAIN_SHIFT)
+#define        AR9170_TX_PHY_TXCHAIN_S                 15
+#define        AR9170_TX_PHY_TXCHAIN                   (7 << \
+                                                AR9170_TX_PHY_TXCHAIN_S)
 #define        AR9170_TX_PHY_TXCHAIN_1                 1
 /* use for cck, ofdm 6/9/12/18/24 and HT if capable */
 #define        AR9170_TX_PHY_TXCHAIN_2                 5
 
-#define        AR9170_TX_PHY_MCS_SHIFT                 18
-#define        AR9170_TX_PHY_MCS_MASK                  (0x7f << AR9170_TX_PHY_MCS_SHIFT)
+#define        AR9170_TX_PHY_MCS_S                     18
+#define        AR9170_TX_PHY_MCS                       (0x7f << \
+                                                AR9170_TX_PHY_MCS_S)
 
 #define        AR9170_TX_PHY_RATE_CCK_1M               0x0
 #define        AR9170_TX_PHY_RATE_CCK_2M               0x1