extern struct ar9170_dma_memory dma_mem;
-#define AR9170_DOWN_BLOCK_RATIO 2
-#define AR9170_RX_BLOCK_RATIO 1
+#define AR9170_DOWN_BLOCK_RATIO 2
+#define AR9170_RX_BLOCK_RATIO 1
/* Tx 16*2 = 32 packets => 32*(5*320) */
-#define AR9170_TX_BLOCK_NUMBER (AR9170_BLOCK_NUMBER * AR9170_DOWN_BLOCK_RATIO / \
- (AR9170_RX_BLOCK_RATIO + AR9170_DOWN_BLOCK_RATIO))
-#define AR9170_RX_BLOCK_NUMBER (AR9170_BLOCK_NUMBER - AR9170_TX_BLOCK_NUMBER)
+#define AR9170_TX_BLOCK_NUMBER (AR9170_BLOCK_NUMBER * AR9170_DOWN_BLOCK_RATIO / \
+ (AR9170_RX_BLOCK_RATIO + AR9170_DOWN_BLOCK_RATIO))
+#define AR9170_RX_BLOCK_NUMBER (AR9170_BLOCK_NUMBER - AR9170_TX_BLOCK_NUMBER)
/* Error code */
-#define AR9170_ERR_FS_BIT 1
-#define AR9170_ERR_LS_BIT 2
-#define AR9170_ERR_OWN_BITS 3
-#define AR9170_ERR_DATA_SIZE 4
-#define AR9170_ERR_TOTAL_LEN 5
-#define AR9170_ERR_DATA 6
-#define AR9170_ERR_SEQ 7
-#define AR9170_ERR_LEN 8
+#define AR9170_ERR_FS_BIT 1
+#define AR9170_ERR_LS_BIT 2
+#define AR9170_ERR_OWN_BITS 3
+#define AR9170_ERR_DATA_SIZE 4
+#define AR9170_ERR_TOTAL_LEN 5
+#define AR9170_ERR_DATA 6
+#define AR9170_ERR_SEQ 7
+#define AR9170_ERR_LEN 8
/* Status bits definitions */
/* Own bits definitions */
-#define AR9170_OWN_BITS_MASK 0x3
-#define AR9170_OWN_BITS_SW 0x0
-#define AR9170_OWN_BITS_HW 0x1
-#define AR9170_OWN_BITS_SE 0x2
+#define AR9170_OWN_BITS 0x3
+#define AR9170_OWN_BITS_S 0
+#define AR9170_OWN_BITS_SW 0x0
+#define AR9170_OWN_BITS_HW 0x1
+#define AR9170_OWN_BITS_SE 0x2
/* Control bits definitions */
#define AR9170_CTRL_TXFAIL 1
#define AR9170_CTRL_BAFAIL 2
-#define AR9170_CTRL_FAIL_MASK (AR9170_CTRL_TXFAIL | AR9170_CTRL_BAFAIL)
+#define AR9170_CTRL_FAIL (AR9170_CTRL_TXFAIL | AR9170_CTRL_BAFAIL)
/* First segament bit */
-#define AR9170_CTRL_LS_BIT 0x100
+#define AR9170_CTRL_LS_BIT 0x100
/* Last segament bit */
-#define AR9170_CTRL_FS_BIT 0x200
+#define AR9170_CTRL_FS_BIT 0x200
struct dma_queue {
struct dma_desc *head;
{
struct dma_desc *desc = NULL;
- if ((q->head->status & AR9170_OWN_BITS_MASK) == bits)
+ if ((q->head->status & AR9170_OWN_BITS) == bits)
desc = dma_unlink_head(q);
return desc;
struct dma_desc *desc = NULL;
/* AR9170_OWN_BITS_HW will be filtered out here too. */
- if ((q->head->status & AR9170_OWN_BITS_MASK) != bits)
+ if ((q->head->status & AR9170_OWN_BITS) != bits)
desc = dma_unlink_head(q);
return desc;
#define __for_each_desc_bits(desc, queue, bits) \
for (desc = (queue)->head; \
(desc != (queue)->terminator && \
- (desc->status & AR9170_OWN_BITS_MASK) == bits); \
+ (desc->status & AR9170_OWN_BITS) == bits); \
desc = desc->lastAddr->nextAddr)
#define __while_desc_bits(desc, queue, bits) \
for (desc = (queue)->head; \
(!queue_empty(queue) && \
- (desc->status & AR9170_OWN_BITS_MASK) == bits); \
+ (desc->status & AR9170_OWN_BITS) == bits); \
desc = (queue)->head)
#define __for_each_desc(desc, queue) \
static inline __inline void dma_rearm(struct dma_desc *desc)
{
/* Set OWN bit to HW */
- desc->status = ((desc->status & (~AR9170_OWN_BITS_MASK)) |
+ desc->status = ((desc->status & (~AR9170_OWN_BITS)) |
AR9170_OWN_BITS_HW);
}
static inline __inline struct ieee80211_hdr *ar9170_get_rx_i3e(struct dma_desc *desc)
{
if (!((ar9170_get_rx_macstatus_status(desc) &
- AR9170_RX_STATUS_MPDU_MASK) & AR9170_RX_STATUS_MPDU_LAST)) {
+ AR9170_RX_STATUS_MPDU) & AR9170_RX_STATUS_MPDU_LAST)) {
return (void *)(DESC_PAYLOAD_OFF(desc,
offsetof(struct ar9170_rx_frame_head, i3e)));
} else {
static inline __inline struct ar9170_rx_head *ar9170_get_rx_head(struct dma_desc *desc)
{
if (!((ar9170_get_rx_macstatus_status(desc) &
- AR9170_RX_STATUS_MPDU_MASK) & AR9170_RX_STATUS_MPDU_LAST)) {
+ AR9170_RX_STATUS_MPDU) & AR9170_RX_STATUS_MPDU_LAST)) {
return (void *)((uint8_t *)DESC_PAYLOAD(desc) +
offsetof(struct ar9170_rx_frame_head, phy_head));
} else {
mac_status = ar9170_get_rx_macstatus_status(rx);
- phy.modulation = mac_status & AR9170_RX_STATUS_MODULATION_MASK;
+ phy.modulation = mac_status & AR9170_RX_STATUS_MODULATION;
phy.chains = AR9170_TX_PHY_TXCHAIN_1;
switch (phy.modulation) {
mpdu_len -= sizeof(struct ar9170_rx_macstatus);
- switch (ar9170_get_rx_macstatus_status(desc) & AR9170_RX_STATUS_MPDU_MASK) {
+ switch (ar9170_get_rx_macstatus_status(desc) & AR9170_RX_STATUS_MPDU) {
case AR9170_RX_STATUS_MPDU_LAST:
mpdu_len -= sizeof(struct ar9170_rx_phystatus);
break;
#define AR9170_RX_ENC_SOFTWARE 0x8
-#define AR9170_RX_STATUS_MODULATION_MASK 0x03
+#define AR9170_RX_STATUS_MODULATION 0x03
+#define AR9170_RX_STATUS_MODULATION_S 0
#define AR9170_RX_STATUS_MODULATION_CCK 0x00
#define AR9170_RX_STATUS_MODULATION_OFDM 0x01
#define AR9170_RX_STATUS_MODULATION_HT 0x02
#define AR9170_RX_STATUS_SHORT_PREAMBLE 0x08
#define AR9170_RX_STATUS_GREENFIELD 0x08
-#define AR9170_RX_STATUS_MPDU_MASK 0x30
+#define AR9170_RX_STATUS_MPDU 0x30
+#define AR9170_RX_STATUS_MPDU_S 4
#define AR9170_RX_STATUS_MPDU_SINGLE 0x00
#define AR9170_RX_STATUS_MPDU_FIRST 0x20
#define AR9170_RX_STATUS_MPDU_MIDDLE 0x30