carl9170 firmware: revamp reset code
authorChristian Lamparter <chunkeey@googlemail.com>
Sat, 14 Aug 2010 00:36:52 +0000 (02:36 +0200)
committerChristian Lamparter <chunkeey@googlemail.com>
Sat, 14 Aug 2010 00:36:52 +0000 (02:36 +0200)
Getting the reset code to work 100% proved to be
a wild-goose chase. Therefore we'll settle with
an easier solution and let the usb subsystem take
care of the clean-up operation.

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
carlfw/include/carl9170.h
carlfw/include/cmd.h
carlfw/include/usb.h
carlfw/src/cmd.c
carlfw/src/main.c
carlfw/usb/main.c
include/shared/hw.h

index 6c19c32d742ca333d6830216a3a6e9e721f2e10c..c85a4f31c529ce737e7da8fdefe284ae5196b65e 100644 (file)
@@ -75,6 +75,7 @@ struct firmware_context_struct {
 
        /* misc */
        unsigned int watchdog_enable;
+       unsigned int reboot;
 
        struct {
                /* Host Interface DMA queues */
index 809a6c29246eb53f23b1764c0980afec86eb817c..c213704fe226807a65798a97aa2c63b3b7791a20 100644 (file)
@@ -50,6 +50,5 @@ static inline void __check(void)
 }
 
 void handle_cmd(struct carl9170_rsp *resp);
-void __attribute__((noreturn)) reboot(void);
 
 #endif /* __CARL9170FW_CMD_H */
index 6501e19ce1ce57136187f6c76f0adb5eaf30aead..59088399506653fa880fed20f3fc104a443abe23 100644 (file)
@@ -181,6 +181,7 @@ void usb_init_highspeed_fifo_cfg(void);
 void usb_init_fullspeed_fifo_cfg(void);
 
 void start(void);
+void __attribute__((noreturn)) reboot(void);
 
 #ifdef CONFIG_CARL9170FW_USB_WATCHDOG
 void usb_watchdog_timer(void);
index 058f9674677752763bd20bb456b119ab6fdaa44a..a9bdb63368f01e8e84836e824273d94dd22049a6 100644 (file)
@@ -69,11 +69,9 @@ void handle_cmd(struct carl9170_rsp *resp)
 
        case CARL9170_CMD_REBOOT:
                /*
-                * reboot does not return and generates no response
                 * resp->len = 0;
                 */
-
-               reboot();
+               fw.reboot = 1;
                break;
 
        case CARL9170_CMD_READ_TSF:
index 35f5d29c88d770541440edbcf57623f4442fa1c3..a9a1306b4693b2fed2ced3c9e95e066b8ac5d484 100644 (file)
@@ -75,14 +75,22 @@ static void init(void)
        down_trigger();
 }
 
+static void handle_fw(void)
+{
+       if (fw.watchdog_enable == 1)
+               set(AR9170_TIMER_REG_WATCH_DOG, AR9170_WATCH_DOG_TIMER);
+
+       if (fw.reboot)
+               reboot();
+}
+
 static void __attribute__((noreturn)) main_loop(void)
 {
        clock_set(true, AHB_40MHZ_OSC);
 
        /* main loop */
        while (1) {
-               if (fw.watchdog_enable == 1)
-                       set(AR9170_TIMER_REG_WATCH_DOG, AR9170_WATCH_DOG_TIMER);
+               handle_fw();
 
                /*
                 * Due to frame order persevation, the wlan subroutines
index 1429607f891a1a7514457d797d247b3f669d6736..00c9326163b0c46d19f17153c835a14f54216e62 100644 (file)
@@ -27,7 +27,6 @@
 #include "printf.h"
 #include "timer.h"
 #include "rom.h"
-#include "gpio.h"
 #include "shared/phy.h"
 
 #ifdef CONFIG_CARL9170FW_DEBUG_USB
@@ -210,26 +209,6 @@ void send_cmd_to_host(const uint8_t len, const uint8_t type,
        usb_trigger_in();
 }
 
-/* Reset all the USB FIFO used for WLAN */
-static void usb_reset_FIFO(void)
-{
-       uint32_t val;
-
-       /*
-        * of course,
-        * simpley ORing AR9170_MAC_POWER_STATE_CTRL_RESET
-        * would be... I dunno, maybe: just to simple?
-        */
-
-       val = get(AR9170_MAC_REG_POWER_STATE_CTRL);
-       val |= AR9170_MAC_POWER_STATE_CTRL_RESET;
-       set(AR9170_MAC_REG_POWER_STATE_CTRL, val);
-
-       /* Reset USB FIFO */
-       set(AR9170_PWR_REG_ADDA_BB, AR9170_PWR_ADDA_BB_USB_FIFO_RESET);
-       set(AR9170_PWR_REG_ADDA_BB, 0x0);
-}
-
 /* Turn off ADDA/RF power, PLL */
 static void turn_power_off(void)
 {
@@ -237,11 +216,20 @@ static void turn_power_off(void)
        set(AR9170_PHY_REG_ADC_CTL, 0xa0000000 |
            AR9170_PHY_ADC_CTL_OFF_PWDADC | AR9170_PHY_ADC_CTL_OFF_PWDDAC);
 
+       /* This will also turn-off the LEDs */
        set(AR9170_GPIO_REG_PORT_DATA, 0);
        set(AR9170_GPIO_REG_PORT_TYPE, 0xf);
 
        set(AR9170_PWR_REG_BASE, 0x40021);
-       set(AR9170_PWR_REG_ADDA_BB, 0);
+
+       set(AR9170_MAC_REG_POWER_STATE_CTRL,
+           AR9170_MAC_POWER_STATE_CTRL_RESET);
+
+       /* Reset USB FIFO */
+       set(AR9170_PWR_REG_RESET, AR9170_PWR_RESET_COMMIT_RESET_MASK |
+                                 AR9170_PWR_RESET_DMA_MASK |
+                                 AR9170_PWR_RESET_WLAN_MASK);
+       set(AR9170_PWR_REG_RESET, 0x0);
 
        clock_set(false, AHB_20_22MHZ);
 
@@ -282,9 +270,6 @@ static void turn_power_off(void)
 
 void __attribute__((noreturn)) reboot(void)
 {
-       /* turn off leds */
-       led_set(0);
-
        /* write watchdog magic pattern for suspend  */
        andl(AR9170_PWR_REG_WATCH_DOG_MAGIC, 0xffff);
        orl(AR9170_PWR_REG_WATCH_DOG_MAGIC, 0x98760000);
@@ -292,9 +277,6 @@ void __attribute__((noreturn)) reboot(void)
        /* Disable watchdog */
        orl(AR9170_TIMER_REG_WATCH_DOG, 0xffff);
 
-       /* Reset USB FIFO */
-       usb_reset_FIFO();
-
        /* Turn off power */
        turn_power_off();
 
index 33e856bbb5eb9db26459c8b96c8470015b857542..30b19a7ef312968fb95525dbd0938113d9a55b3a 100644 (file)
 
 #define AR9170_PWR_REG_POWER_STATE             (AR9170_PWR_REG_BASE + 0x000)
 
-#define        AR9170_PWR_REG_ADDA_BB                  (AR9170_PWR_REG_BASE + 0x004)
-#define                AR9170_PWR_ADDA_BB_USB_FIFO_RESET       0x00000005
-#define                AR9170_PWR_ADDA_BB_COLD_RESET           0x00000800
-#define                AR9170_PWR_ADDA_BB_WARM_RESET           0x00000400
+#define        AR9170_PWR_REG_RESET                    (AR9170_PWR_REG_BASE + 0x004)
+#define                AR9170_PWR_RESET_COMMIT_RESET_MASK      BIT(0)
+#define                AR9170_PWR_RESET_WLAN_MASK              BIT(1)
+#define                AR9170_PWR_RESET_DMA_MASK               BIT(2)
+#define                AR9170_PWR_RESET_BRIDGE_MASK            BIT(3)
+#define                AR9170_PWR_RESET_AHB_MASK               BIT(9)
+#define                AR9170_PWR_RESET_BB_WARM_RESET          BIT(10)
+#define                AR9170_PWR_RESET_BB_COLD_RESET          BIT(11)
+#define                AR9170_PWR_RESET_ADDA_CLK_COLD_RESET    BIT(12)
+#define                AR9170_PWR_RESET_PLL                    BIT(13)
+#define                AR9170_PWR_RESET_USB_PLL                BIT(14)
 
 #define        AR9170_PWR_REG_CLOCK_SEL                (AR9170_PWR_REG_BASE + 0x008)
 #define                AR9170_PWR_CLK_AHB_40MHZ                0