X-Git-Url: https://jxself.org/git/?a=blobdiff_plain;f=target_firmware%2Fwlan%2Fif_owl.c;h=919a4784f9e0c4339f751b7ff0666b0938cc4068;hb=HEAD;hp=218c77b5286a4214b3709b19b15e99c5144f5fd8;hpb=db0274a50aa0f2e6ada472d88054a22c860e2f2c;p=open-ath9k-htc-firmware.git diff --git a/target_firmware/wlan/if_owl.c b/target_firmware/wlan/if_owl.c index 218c77b..919a478 100755 --- a/target_firmware/wlan/if_owl.c +++ b/target_firmware/wlan/if_owl.c @@ -57,6 +57,7 @@ #include "if_athrate.h" #include "if_athvar.h" #include "ah_desc.h" +#include "ah_internal.h" #define ath_tgt_free_skb adf_nbuf_free @@ -147,6 +148,8 @@ static void ath_tx_comp_cleanup(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) int ath_tgt_tx_add_to_aggr(struct ath_softc_tgt *sc, struct ath_buf *bf,int datatype, ath_atx_tid_t *tid, int is_burst); +int ath_tgt_tx_form_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid, + ath_tx_bufhead *bf_q); struct ieee80211_frame *ATH_SKB_2_WH(adf_nbuf_t skb) { @@ -228,9 +231,7 @@ static void ath_dma_map(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) static void ath_dma_unmap(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { - adf_nbuf_t skb = bf->bf_skb; - - skb = adf_nbuf_queue_first(&bf->bf_skbhead); + adf_nbuf_queue_first(&bf->bf_skbhead); adf_nbuf_unmap( sc->sc_dev, bf->bf_dmamap, ADF_OS_DMA_TO_DEVICE); } @@ -556,6 +557,8 @@ void ath_tx_status_update(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) if (txs == NULL) return; + txs->txstatus[txs->cnt].ts_flags = 0; + txs->txstatus[txs->cnt].cookie = bf->bf_cookie; txs->txstatus[txs->cnt].ts_rate = SM(bf->bf_endpt, ATH9K_HTC_TXSTAT_EPID); @@ -879,14 +882,13 @@ static void ath_tgt_txq_add_ucast(struct ath_softc_tgt *sc, struct ath_tx_buf *b { struct ath_hal *ah = sc->sc_ah; struct ath_txq *txq; - HAL_STATUS status; volatile a_int32_t txe_val; adf_os_assert(bf); txq = bf->bf_txq; - status = ah->ah_procTxDesc(ah, bf->bf_lastds); + ah->ah_procTxDesc(ah, bf->bf_lastds); ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); @@ -895,7 +897,7 @@ static void ath_tgt_txq_add_ucast(struct ath_softc_tgt *sc, struct ath_tx_buf *b } else { *txq->axq_link = ATH_BUF_GET_DESC_PHY_ADDR(bf); - txe_val = OS_REG_READ(ah, 0x840); + txe_val = ioread32_mac(0x0840); if (!(txe_val & (1<< txq->axq_qnum))) ah->ah_setTxDP(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf)); } @@ -967,9 +969,13 @@ ath_tgt_tx_send_normal(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) rcs, &isProbe); ath_hal_memcpy(bf->bf_rcs, rcs, sizeof(rcs)); } else { + struct ath_vap_target *avp; + + avp = &sc->sc_vap[bf->vap_index]; + mrcs[1].tries = mrcs[2].tries = mrcs[3].tries = 0; mrcs[1].rix = mrcs[2].rix = mrcs[3].rix = 0; - mrcs[0].rix = 0; + mrcs[0].rix = ath_get_minrateidx(sc, avp); mrcs[0].tries = 1; mrcs[0].flags = 0; ath_hal_memcpy(bf->bf_rcs, mrcs, sizeof(mrcs)); @@ -987,9 +993,9 @@ ath_tx_freebuf(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) struct ath_hal *ah = sc->sc_ah; for (bfd = bf->bf_desc, i = 0; i < bf->bf_dmamap_info.nsegs; bfd++, i++) { - ah->ah_clr11nAggr(ah, bfd); - ah->ah_set11nBurstDuration(ah, bfd, 0); - ah->ah_set11nVirtualMoreFrag(ah, bfd, 0); + ah->ah_clr11nAggr(bfd); + ah->ah_set11nBurstDuration(bfd, 0); + ah->ah_set11nVirtualMoreFrag(bfd, 0); } ath_dma_unmap(sc, bf); @@ -1021,13 +1027,15 @@ static void ath_update_stats(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { struct ath_tx_desc *ds = bf->bf_desc; + struct ieee80211_frame *wh = ATH_SKB2_WH(bf->bf_skb); u_int32_t sr, lr; if (ds->ds_txstat.ts_status == 0) { if (ds->ds_txstat.ts_rate & HAL_TXSTAT_ALTRATE) sc->sc_tx_stats.ast_tx_altrate++; } else { - if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) + if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY && + !IEEE80211_IS_MULTICAST(wh->i_addr1)) sc->sc_tx_stats.ast_tx_xretries++; if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) sc->sc_tx_stats.ast_tx_fifoerr++; @@ -1100,7 +1108,6 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb, hdrlen = ieee80211_anyhdrsize(wh); pktlen = len; keyix = HAL_TXKEYIX_INVALID; - pktlen -= (hdrlen & 3); pktlen += IEEE80211_CRC_LEN; if (iswep) @@ -1134,6 +1141,8 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb, atype = HAL_PKT_TYPE_NORMAL; break; + case IEEE80211_FC0_TYPE_CTL: + flags |= HAL_TXDESC_NOACK; default: atype = HAL_PKT_TYPE_NORMAL; break; @@ -1408,7 +1417,7 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid) bf->bf_next = NULL; for(ds = bf->bf_desc; ds <= bf->bf_lastds; ds++) - ah->ah_clr11nAggr(ah, ds); + ah->ah_clr11nAggr(ds); ath_buf_set_rate(sc, bf); bf->bf_txq_add(sc, bf); @@ -1427,7 +1436,7 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid) bf->bf_lastds = bf_last->bf_lastds; for (i = 0; i < bf_last->bf_dmamap_info.nsegs; i++) - ah->ah_set11nAggrLast(ah, &bf_last->bf_descarr[i]); + ah->ah_set11nAggrLast(&bf_last->bf_descarr[i]); if (status == ATH_AGGR_8K_LIMITED) { adf_os_assert(0); @@ -1572,7 +1581,7 @@ int ath_tgt_tx_form_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid, bf_prev = bf; for(ds = bf->bf_desc; ds <= bf->bf_lastds; ds++) - ah->ah_set11nAggrMiddle(ah, ds, bf->bf_ndelim); + ah->ah_set11nAggrMiddle(ds, bf->bf_ndelim); } while (!asf_tailq_empty(&tid->buf_q)); @@ -1739,21 +1748,13 @@ ath_tx_comp_cleanup(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) struct ath_tx_desc lastds; struct ath_tx_desc *ds = &lastds; struct ath_rc_series rcs[4]; - u_int16_t seq_st; - u_int32_t *ba; - int ba_index; int nbad = 0; int nframes = bf->bf_nframes; struct ath_tx_buf *bf_next; - int tx_ok = 1; adf_os_mem_copy(ds, bf->bf_lastds, sizeof (struct ath_tx_desc)); adf_os_mem_copy(rcs, bf->bf_rcs, sizeof(rcs)); - seq_st = ATH_DS_BA_SEQ(ds); - ba = ATH_DS_BA_BITMAP(ds); - tx_ok = (ATH_DS_TX_STATUS(ds) == HAL_OK); - if (!bf->bf_isaggr) { ath_update_stats(sc, bf); @@ -1772,7 +1773,6 @@ ath_tx_comp_cleanup(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) } while (bf) { - ba_index = ATH_BA_INDEX(seq_st, SEQNO_FROM_BF_SEQNO(bf->bf_seqno)); bf_next = bf->bf_next; ath_tx_status_update_aggr(sc, bf, ds, rcs, 0); @@ -1807,9 +1807,9 @@ ath_tx_retry_subframe(struct ath_softc_tgt *sc, struct ath_tx_buf *bf, __stats(sc, txaggr_compretries); for(ds = bf->bf_desc, i = 0; i < bf->bf_dmamap_info.nsegs; ds++, i++) { - ah->ah_clr11nAggr(ah, ds); - ah->ah_set11nBurstDuration(ah, ds, 0); - ah->ah_set11nVirtualMoreFrag(ah, ds, 0); + ah->ah_clr11nAggr(ds); + ah->ah_set11nBurstDuration(ds, 0); + ah->ah_set11nVirtualMoreFrag(ds, 0); } if (bf->bf_retries >= OWLMAX_RETRIES) { @@ -1959,9 +1959,6 @@ void ath_tgt_tx_cleanup(struct ath_softc_tgt *sc, struct ath_node_target *an, { struct ath_tx_buf *bf; struct ath_tx_buf *bf_next; - struct ath_txq *txq; - - txq = TID_TO_ACTXQ(tid->tidno); bf = asf_tailq_first(&tid->buf_q); @@ -2058,11 +2055,9 @@ static void ath_bar_tx_comp(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) struct ath_tx_desc *ds = bf->bf_lastds; struct ath_node_target *an; ath_atx_tid_t *tid; - struct ath_txq *txq; an = (struct ath_node_target *)bf->bf_node; tid = &an->tid[bf->bf_tidno]; - txq = TID_TO_ACTXQ(tid->tidno); if (ATH_DS_TX_STATUS(ds) & HAL_TXERR_XRETRY) { ath_bar_retry(sc, bf); @@ -2085,7 +2080,6 @@ static void ath_bar_tx(struct ath_softc_tgt *sc, struct ath_hal *ah = sc->sc_ah; HAL_11N_RATE_SERIES series[4]; int i = 0; - adf_nbuf_queue_t skbhead; a_uint8_t *anbdata; a_uint32_t anblen; @@ -2136,12 +2130,11 @@ static void ath_bar_tx(struct ath_softc_tgt *sc, | HAL_TXDESC_CLRDMASK , 0, 0); - skbhead = bf->bf_skbhead; bf->bf_isaggr = 0; bf->bf_next = NULL; for (ds0 = ds, i=0; i < bf->bf_dmamap_info.nsegs; ds0++, i++) { - ah->ah_clr11nAggr(ah, ds0); + ah->ah_clr11nAggr(ds0); } ath_filltxdesc(sc, bf);