X-Git-Url: https://jxself.org/git/?a=blobdiff_plain;f=target_firmware%2Fwlan%2Fif_owl.c;h=4cce3e65784acc23b5250b9a58e4b9c9b4b6dea3;hb=d25160b24033ace7c0d735446eaf069b279f92e9;hp=38f8964b353fe0e5d5ebc6537f6fa5ad37ecec83;hpb=9cd8e0e1b11ce21ece5b2e5191fb42b05dae9866;p=open-ath9k-htc-firmware.git

diff --git a/target_firmware/wlan/if_owl.c b/target_firmware/wlan/if_owl.c
index 38f8964..4cce3e6 100755
--- a/target_firmware/wlan/if_owl.c
+++ b/target_firmware/wlan/if_owl.c
@@ -47,7 +47,6 @@
 #include <adf_net.h>
 #include <adf_net_wcmd.h>
 
-#include "if_ethersubr.h"
 #include "if_llc.h"
 
 #ifdef USE_HEADERLEN_RESV
@@ -58,7 +57,6 @@
 #include "if_athrate.h"
 #include "if_athvar.h"
 #include "ah_desc.h"
-#include "if_ath_pci.h"
 
 #define ath_tgt_free_skb  adf_nbuf_free
 
@@ -133,7 +131,7 @@ static void
 ath_tx_update_baw(ath_atx_tid_t *tid, int seqno);
 static  void
 ath_tx_retry_subframe(struct ath_softc_tgt *sc, struct ath_tx_buf *bf,
-		      ath_bufhead *bf_q, struct ath_tx_buf **bar);
+		      ath_tx_bufhead *bf_q, struct ath_tx_buf **bar);
 
 static void
 ath_tx_comp_aggr_error(struct ath_softc_tgt *sc, struct ath_tx_buf *bf, ath_atx_tid_t *tid);
@@ -239,6 +237,7 @@ static void ath_dma_unmap(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 static void ath_filltxdesc(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 {
 	struct ath_tx_desc *ds0, *ds = bf->bf_desc;
+	struct ath_hal *ah = sc->sc_ah;
 	a_uint8_t i;
 
 	ds0 = ds;
@@ -254,7 +253,7 @@ static void ath_filltxdesc(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 		} else
 			ds->ds_link = ATH_BUF_GET_DESC_PHY_ADDR_WITH_IDX(bf, i+1);
 
-		ath_hal_filltxdesc(sc->sc_ah, ds
+		ah->ah_fillTxDesc(ah, ds
 				   , bf->bf_dmamap_info.dma_segs[i].len
 				   , i == 0
 				   , i == (bf->bf_dmamap_info.nsegs - 1)
@@ -264,7 +263,8 @@ static void ath_filltxdesc(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 
 static void ath_tx_tgt_setds(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 {
-	struct ath_desc *ds = bf->bf_desc;
+	struct ath_tx_desc *ds = bf->bf_desc;
+	struct ath_hal *ah = sc->sc_ah;
 
 	switch (bf->bf_protmode) {
     	case IEEE80211_PROT_RTSCTS:
@@ -277,7 +277,7 @@ static void ath_tx_tgt_setds(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 		break;
 	}
 
-	ath_hal_set11n_txdesc(sc->sc_ah, ds
+	ah->ah_set11nTxDesc(ah, ds
 			      , bf->bf_pktlen
 			      , bf->bf_atype
 			      , 60
@@ -368,7 +368,7 @@ static void ath_buf_set_rate(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 {
     struct ath_hal *ah = sc->sc_ah;
     const HAL_RATE_TABLE *rt;
-    struct ath_desc *ds = bf->bf_desc;
+    struct ath_tx_desc *ds = bf->bf_desc;
     HAL_11N_RATE_SERIES series[4];
     a_int32_t i, flags;
     a_uint8_t rix, cix, rtsctsrate;
@@ -444,7 +444,7 @@ static void ath_buf_set_rate(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
     rtsctsrate = rt->info[cix].rateCode |
 	    (bf->bf_shpream ? rt->info[cix].shortPreamble : 0);
 
-    ath_hal_set11n_ratescenario(ah, ds, 1,
+    ah->ah_set11nRateScenario(ah, ds, 1,
 				rtsctsrate, ctsduration,
 				series, 4,
 				flags);
@@ -618,9 +618,10 @@ void ath_tx_status_send(struct ath_softc_tgt *sc)
 
 static void owltgt_tx_process_cabq(struct ath_softc_tgt *sc, struct ath_txq *txq)
 {
-	ath_hal_intrset(sc->sc_ah, sc->sc_imask & ~HAL_INT_SWBA);
+	struct ath_hal *ah = sc->sc_ah;
+	ah->ah_setInterrupts(ah, sc->sc_imask & ~HAL_INT_SWBA);
 	owltgt_tx_processq(sc, txq, OWL_TXQ_ACTIVE);
-	ath_hal_intrset(sc->sc_ah, sc->sc_imask);
+	ah->ah_setInterrupts(ah, sc->sc_imask);
 }
 
 void owl_tgt_tx_tasklet(TQUEUE_ARG data)
@@ -890,17 +891,17 @@ static void ath_tgt_txq_add_ucast(struct ath_softc_tgt *sc, struct ath_tx_buf *b
 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
 
 	if (txq->axq_link == NULL) {
-		ath_hal_puttxbuf(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf));
+		ah->ah_setTxDP(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf));
 	} else {
 		*txq->axq_link = ATH_BUF_GET_DESC_PHY_ADDR(bf);
 
 		txe_val = OS_REG_READ(ah, 0x840);
 		if (!(txe_val & (1<< txq->axq_qnum)))
-			ath_hal_puttxbuf(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf));
+			ah->ah_setTxDP(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf));
 	}
 
 	txq->axq_link = &bf->bf_lastds->ds_link;
-	ath_hal_txstart(ah, txq->axq_qnum);
+	ah->ah_startTxDma(ah, txq->axq_qnum);
 }
 
 static a_int32_t ath_tgt_txbuf_setup(struct ath_softc_tgt *sc,
@@ -951,7 +952,7 @@ ath_get_pktlen(struct ath_tx_buf *bf, a_int32_t hdrlen)
 void
 ath_tgt_tx_send_normal(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 {
-	struct ath_node_target *an = bf->bf_node;
+	struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node);
 	struct ath_rc_series rcs[4];
 	struct ath_rc_series mrcs[4];
 	a_int32_t shortPreamble = 0;
@@ -982,11 +983,12 @@ static void
 ath_tx_freebuf(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 {
 	a_int32_t i ;
-	struct ath_desc *bfd = NULL;
+	struct ath_tx_desc *bfd = NULL;
+	struct ath_hal *ah = sc->sc_ah;
 
 	for (bfd = bf->bf_desc, i = 0; i < bf->bf_dmamap_info.nsegs; bfd++, i++) {
-		ath_hal_clr11n_aggr(sc->sc_ah, bfd);
-		ath_hal_set11n_burstduration(sc->sc_ah, bfd, 0);
+		ah->ah_clr11nAggr(ah, bfd);
+		ah->ah_set11nBurstDuration(ah, bfd, 0);
 		ath_hal_set11n_virtualmorefrag(sc->sc_ah, bfd, 0);
 	}
 
@@ -1051,7 +1053,7 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb,
 	a_uint8_t rix, txrate, ctsrate, cix = 0xff, *data;
 	a_uint32_t ivlen = 0, icvlen = 0, subtype, flags, ctsduration;
 	a_int32_t i, iswep, ismcast, hdrlen, pktlen, try0, len;
-	struct ath_desc *ds=NULL;
+	struct ath_tx_desc *ds=NULL;
 	struct ath_txq *txq=NULL;
 	struct ath_tx_buf *bf;
 	HAL_PKT_TYPE atype;
@@ -1198,7 +1200,7 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb,
 
 	flags |= HAL_TXDESC_INTREQ;
 
-	ath_hal_setuptxdesc(ah, ds
+	ah->ah_setupTxDesc(ah, ds
 			    , pktlen
 			    , hdrlen
 			    , atype
@@ -1220,8 +1222,8 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb,
 	 * in Auth frame 3 of Shared Authentication, owl needs this.
 	 */
 	if (iswep && (keyix != HAL_TXKEYIX_INVALID) &&
-	    (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == IEEE80211_FC0_SUBTYPE_AUTH)
-		ath_hal_fillkeytxdesc(ah, ds, mh->keytype);
+			(wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == IEEE80211_FC0_SUBTYPE_AUTH)
+		ah->ah_fillKeyTxDesc(ah, ds, mh->keytype);
 
 	ath_filltxdesc(sc, bf);
 
@@ -1231,7 +1233,7 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb,
 		series[i].ChSel = sc->sc_ic.ic_tx_chainmask;
 		series[i].RateFlags = 0;
 	}
-	ath_hal_set11n_ratescenario(ah, ds, 0, ctsrate, ctsduration, series, 4, 0);
+	ah->ah_set11nRateScenario(ah, ds, 0, ctsrate, ctsduration, series, 4, 0);
 	ath_tgt_txqaddbuf(sc, txq, bf, bf->bf_lastds);
 
 	return;
@@ -1250,13 +1252,13 @@ ath_tgt_txqaddbuf(struct ath_softc_tgt *sc,
 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
 
 	if (txq->axq_link == NULL) {
-		ath_hal_puttxbuf(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf));
+		ah->ah_setTxDP(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf));
 	} else {
 		*txq->axq_link = ATH_BUF_GET_DESC_PHY_ADDR(bf);
 	}
 
 	txq->axq_link = &lastds->ds_link;
-	ath_hal_txstart(ah, txq->axq_qnum);
+	ah->ah_startTxDma(ah, txq->axq_qnum);
 }
 
 void ath_tgt_handle_normal(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
@@ -1357,7 +1359,7 @@ ath_tgt_handle_aggr(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 static void
 ath_tgt_tx_sched_normal(struct ath_softc_tgt *sc, ath_atx_tid_t *tid)
 {
-	struct ath_buf *bf;
+	struct ath_tx_buf *bf;
 	struct ath_txq *txq =TID_TO_ACTXQ(tid->tidno);;
 
 	do {
@@ -1376,9 +1378,10 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid)
 {
 	struct ath_tx_buf  *bf, *bf_last;
 	ATH_AGGR_STATUS status;
-	ath_bufhead bf_q;
+	ath_tx_bufhead bf_q;
 	struct ath_txq *txq = TID_TO_ACTXQ(tid->tidno);
-	struct ath_desc *ds = NULL;
+	struct ath_tx_desc *ds = NULL;
+	struct ath_hal *ah = sc->sc_ah;
 	int i;
 
 
@@ -1397,7 +1400,7 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid)
 			break;
 
 		bf = asf_tailq_first(&bf_q);
-		bf_last = asf_tailq_last(&bf_q, ath_bufhead_s);
+		bf_last = asf_tailq_last(&bf_q, ath_tx_bufhead_s);
 
 		if (bf->bf_nframes == 1) {
 
@@ -1409,7 +1412,7 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid)
 			bf->bf_next = NULL;
 
 			for(ds = bf->bf_desc; ds <= bf->bf_lastds; ds++)
-				ath_hal_clr11n_aggr(sc->sc_ah, ds);
+				ah->ah_clr11nAggr(ah, ds);
 
 			ath_buf_set_rate(sc, bf);
 			bf->bf_txq_add(sc, bf);
@@ -1423,12 +1426,12 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid)
 
 		bf->bf_isaggr  = 1;
 		ath_buf_set_rate(sc, bf);
-		ath_hal_set11n_aggr_first(sc->sc_ah, bf->bf_desc, bf->bf_al,
+		ah->ah_set11nAggrFirst(ah, bf->bf_desc, bf->bf_al,
 					  bf->bf_ndelim);
 		bf->bf_lastds = bf_last->bf_lastds;
 
 		for (i = 0; i < bf_last->bf_dmamap_info.nsegs; i++)
-			ath_hal_set11n_aggr_last(sc->sc_ah, &bf_last->bf_descarr[i]);
+			ah->ah_set11nAggrLast(ah, &bf_last->bf_descarr[i]);
 
 		if (status == ATH_AGGR_8K_LIMITED) {
 			adf_os_assert(0);
@@ -1490,12 +1493,13 @@ static u_int32_t ath_lookup_rate(struct ath_softc_tgt *sc,
 }
 
 int ath_tgt_tx_form_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid,
-			 ath_bufhead *bf_q)
+			 ath_tx_bufhead *bf_q)
 {
 	struct ath_tx_buf *bf_first ,*bf_prev = NULL;
 	int nframes = 0, rl = 0;;
-	struct ath_desc *ds = NULL;
+	struct ath_tx_desc *ds = NULL;
 	struct ath_tx_buf *bf;
+	struct ath_hal *ah = sc->sc_ah;
 	u_int16_t aggr_limit =  (64*1024 -1), al = 0, bpad = 0, al_delta;
 	u_int16_t h_baw = tid->baw_size/2, prev_al = 0, prev_frames = 0;
 
@@ -1572,7 +1576,7 @@ int ath_tgt_tx_form_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid,
 		bf_prev = bf;
 
 		for(ds = bf->bf_desc; ds <= bf->bf_lastds; ds++)
-			ath_hal_set11n_aggr_middle(sc->sc_ah, ds, bf->bf_ndelim);
+			ah->ah_set11nAggrMiddle(ah, ds, bf->bf_ndelim);
 
 	} while (!asf_tailq_empty(&tid->buf_q));
 
@@ -1613,10 +1617,10 @@ void ath_tgt_tx_comp_aggr(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 	int ba_index;
 	int nbad = 0;
 	int nframes = bf->bf_nframes;
-	struct ath_buf *bf_next;
-	ath_bufhead bf_q;
+	struct ath_tx_buf *bf_next;
+	ath_tx_bufhead bf_q;
 	int tx_ok = 1;
-	struct ath_buf *bar = NULL;
+	struct ath_tx_buf *bar = NULL;
 	struct ath_txq *txq;
 
 	txq = bf->bf_txq;
@@ -1696,12 +1700,12 @@ ath_tx_comp_aggr_error(struct ath_softc_tgt *sc, struct ath_tx_buf *bf,
 
 
 	struct ath_tx_desc lastds;
-	struct ath_desc *ds = &lastds;
+	struct ath_tx_desc *ds = &lastds;
 	struct ath_rc_series rcs[4];
-	struct ath_buf *bar = NULL;
-	struct ath_buf *bf_next;
+	struct ath_tx_buf *bar = NULL;
+	struct ath_tx_buf *bf_next;
 	int nframes = bf->bf_nframes;
-	ath_bufhead bf_q;
+	ath_tx_bufhead bf_q;
 	struct ath_txq *txq;
 
 	asf_tailq_init(&bf_q);
@@ -1744,7 +1748,7 @@ ath_tx_comp_cleanup(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 	int ba_index;
 	int nbad = 0;
 	int nframes = bf->bf_nframes;
-	struct ath_buf *bf_next;
+	struct ath_tx_buf *bf_next;
 	int tx_ok = 1;
 
 	adf_os_mem_copy(ds, bf->bf_lastds, sizeof (struct ath_tx_desc));
@@ -1795,19 +1799,20 @@ ath_tx_comp_cleanup(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 
 static void
 ath_tx_retry_subframe(struct ath_softc_tgt *sc, struct ath_tx_buf *bf,
-		      ath_bufhead *bf_q, struct ath_tx_buf **bar)
+		      ath_tx_bufhead *bf_q, struct ath_tx_buf **bar)
 {
 
 	struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node);
 	ath_atx_tid_t *tid = ATH_AN_2_TID(an, bf->bf_tidno);
-	struct ath_desc *ds = NULL;
+	struct ath_tx_desc *ds = NULL;
+	struct ath_hal *ah = sc->sc_ah;
 	int i = 0;
 
 	__stats(sc, txaggr_compretries);
 
 	for(ds = bf->bf_desc, i = 0; i < bf->bf_dmamap_info.nsegs; ds++, i++) {
-		ath_hal_clr11n_aggr(sc->sc_ah, ds);
-		ath_hal_set11n_burstduration(sc->sc_ah, ds, 0);
+		ah->ah_clr11nAggr(ah, ds);
+		ah->ah_set11nBurstDuration(ah, ds, 0);
 		ath_hal_set11n_virtualmorefrag(sc->sc_ah, ds, 0);
 	}
 
@@ -1879,7 +1884,7 @@ ath_tx_comp_unaggr(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 {
 	struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node);
 	ath_atx_tid_t *tid = ATH_AN_2_TID(an, bf->bf_tidno);
-	struct ath_desc *ds  = bf->bf_lastds;
+	struct ath_tx_desc *ds  = bf->bf_lastds;
 
 	ath_update_stats(sc, bf);
 	ath_rate_tx_complete(sc, an, ds, bf->bf_rcs, 1, 0);
@@ -2054,7 +2059,7 @@ static void ath_bar_retry(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 
 static void ath_bar_tx_comp(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 {
-	struct ath_desc *ds = bf->bf_lastds;
+	struct ath_tx_desc *ds = bf->bf_lastds;
 	struct ath_node_target *an;
 	ath_atx_tid_t *tid;
 	struct ath_txq *txq;
@@ -2080,7 +2085,8 @@ static void ath_bar_tx(struct ath_softc_tgt *sc,
 	adf_nbuf_t skb;
 	struct ieee80211_frame_bar *bar;
 	u_int8_t min_rate;
-	struct ath_desc *ds, *ds0;
+	struct ath_tx_desc *ds, *ds0;
+	struct ath_hal *ah = sc->sc_ah;
 	HAL_11N_RATE_SERIES series[4];
 	int i = 0;
 	adf_nbuf_queue_t skbhead;
@@ -2089,7 +2095,7 @@ static void ath_bar_tx(struct ath_softc_tgt *sc,
 
 	__stats(sc, tx_bars);
 
-	memset(&series, 0, sizeof(series));
+	adf_os_mem_set(&series, 0, sizeof(series));
 
 	ath_aggr_pause_tid(sc, tid);
 
@@ -2122,7 +2128,7 @@ static void ath_bar_tx(struct ath_softc_tgt *sc,
 	adf_nbuf_dmamap_info(bf->bf_dmamap, &bf->bf_dmamap_info);
 
 	ds = bf->bf_desc;
-	ath_hal_setuptxdesc(sc->sc_ah, ds
+	ah->ah_setupTxDesc(ah, ds
 			    , adf_nbuf_len(skb) + IEEE80211_CRC_LEN
 			    , 0
 			    , HAL_PKT_TYPE_NORMAL
@@ -2141,7 +2147,7 @@ static void ath_bar_tx(struct ath_softc_tgt *sc,
 	bf->bf_next = NULL;
 
 	for (ds0 = ds, i=0; i < bf->bf_dmamap_info.nsegs; ds0++, i++) {
-		ath_hal_clr11n_aggr(sc->sc_ah, ds0);
+		ah->ah_clr11nAggr(ah, ds0);
 	}
 
 	ath_filltxdesc(sc, bf);
@@ -2152,6 +2158,6 @@ static void ath_bar_tx(struct ath_softc_tgt *sc,
 		series[i].ChSel = sc->sc_ic.ic_tx_chainmask;
 	}
 
-	ath_hal_set11n_ratescenario(sc->sc_ah, bf->bf_desc, 0, 0, 0, series, 4, 4);
+	ah->ah_set11nRateScenario(ah, bf->bf_desc, 0, 0, 0, series, 4, 4);
 	ath_tgt_txq_add_ucast(sc, bf);
 }