X-Git-Url: https://jxself.org/git/?a=blobdiff_plain;f=target_firmware%2Fmagpie_fw_dev%2Ftarget%2Finit%2Finit.c;h=3855b34d7484093ee9b371539683f08f4747fde2;hb=90e55d1c333c48c5bd46cf1b32924f7341f2a00b;hp=922cf6a9638d0360b6cd87bb36ac41fdd47e8394;hpb=8804cc94e3b66550797279f540b960d18a78421f;p=open-ath9k-htc-firmware.git diff --git a/target_firmware/magpie_fw_dev/target/init/init.c b/target_firmware/magpie_fw_dev/target/init/init.c index 922cf6a..3855b34 100755 --- a/target_firmware/magpie_fw_dev/target/init/init.c +++ b/target_firmware/magpie_fw_dev/target/init/init.c @@ -1,10 +1,46 @@ +/* + * Copyright (c) 2013 Qualcomm Atheros, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted (subject to the limitations in the + * disclaimer below) provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Qualcomm Atheros nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE + * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN + * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #if defined(_RAM_) #include "athos_api.h" - +#include "usb_defs.h" + +#include "adf_os_io.h" + #if defined(PROJECT_MAGPIE) #include "regdump.h" -#include "usb_defs.h" extern uint32_t *init_htc_handle; uint8_t htc_complete_setup = 0; void reset_EP4_FIFO(void); @@ -26,11 +62,9 @@ uint32_t idle_cnt = 0; #if defined(PROJECT_K2) // save the ROM printf function point -uint32_t save_cmnos_printf; +int (* save_cmnos_printf)(const char * fmt, ...); #endif -#define ATH_DATE_STRING __DATE__" "__TIME__ - static void idle_task(); #if defined(PROJECT_MAGPIE) @@ -52,28 +86,23 @@ void fatal_exception_func() void change_magpie_clk(void) { - volatile uint32_t i=0, rd_data; - - HAL_WORD_REG_WRITE(0x00056004, 0x11); - rd_data = HAL_WORD_REG_READ(0x00056004) & 0x1; + iowrite32(0x00056004, BIT4 | BIT0); - /* Wait for the update bit to get cleared */ - while (rd_data) - rd_data = HAL_WORD_REG_READ(0x00056004) & 0x1; + /* Wait for the update bit (BIT0) to get cleared */ + while (ioread32(0x00056004) & BIT0) + ; /* Put the PLL into reset */ - rd_data = HAL_WORD_REG_READ(0x00050010) | (1<<1); - HAL_WORD_REG_WRITE(0x00050010,rd_data); + io32_set(0x00050010, BIT1); /* * XXX: statically set the CPU clock to 200Mhz */ - /* Setting of the PLL */ - HAL_WORD_REG_WRITE(0x00056000, 0x325);//400 MHz + /* Setting PLL to 400MHz */ + iowrite32(0x00056000, 0x325); /* Pull CPU PLL out of Reset */ - rd_data = HAL_WORD_REG_READ(0x00050010) & ~(1<<1); - HAL_WORD_REG_WRITE(0x00050010,rd_data); + io32_clr(0x00050010, BIT1); A_DELAY_USECS(60); // wait for stable @@ -81,11 +110,10 @@ change_magpie_clk(void) /* * AHB clk = ( CPU clk / 2 ) */ - HAL_WORD_REG_WRITE(0x00056004, ((0x00001 | (1 << 16)|(1 << 8)))); // set plldiv to 2 - rd_data = HAL_WORD_REG_READ(0x00056004) & 0x1; + iowrite32(0x00056004, 0x00001 | BIT16 | BIT8); /* set plldiv to 2 */ - while (rd_data) - rd_data = HAL_WORD_REG_READ(0x00056004) & 0x1; + while (ioread32(0x00056004) & BIT0) + ; /* UART Setting */ A_UART_HWINIT((100*1000*1000), 115200); @@ -103,25 +131,23 @@ void exception_reset(struct register_dump_s *dump) /* phase II reset */ A_PRINTF("exception reset-phase 2\n"); - *((volatile uint32_t*)WATCH_DOG_MAGIC_PATTERN_ADDR) = WDT_MAGIC_PATTERN; + iowrite32(WATCH_DOG_MAGIC_PATTERN_ADDR, WDT_MAGIC_PATTERN); - HAL_WORD_REG_WRITE(MAGPIE_REG_RST_RESET_ADDR, - HAL_WORD_REG_READ(MAGPIE_REG_RST_RESET_ADDR)|(BIT10|BIT8|BIT7|BIT6)); + io32_set(MAGPIE_REG_RST_RESET_ADDR, BIT10 | BIT8 | BIT7 | BIT6); - HAL_WORD_REG_WRITE(MAGPIE_REG_AHB_ARB_ADDR, - (HAL_WORD_REG_READ(MAGPIE_REG_AHB_ARB_ADDR)|BIT1)); + io32_set(MAGPIE_REG_AHB_ARB_ADDR, BIT1); - HAL_WORD_REG_WRITE((USB_CTRL_BASE_ADDRESS+0x118), 0x0); - HAL_WORD_REG_WRITE(0x50010, HAL_WORD_REG_READ(0x50010)|BIT4); + iowrite32_usb(ZM_SOC_USB_DMA_RESET_OFFSET, 0x0); + io32_set(0x50010, BIT4); A_DELAY_USECS(5); - HAL_WORD_REG_WRITE(0x50010, HAL_WORD_REG_READ(0x50010)&~BIT4); + io32_clr(0x50010, BIT4); A_DELAY_USECS(5); - HAL_WORD_REG_WRITE((USB_CTRL_BASE_ADDRESS+0x118), 0x1); + iowrite32_usb(ZM_SOC_USB_DMA_RESET_OFFSET, BIT0); // set clock to bypass mode - 40Mhz from XTAL - HAL_WORD_REG_WRITE(MAGPIE_REG_CPU_PLL_BYPASS_ADDR, (BIT0|BIT4)); + iowrite32(MAGPIE_REG_CPU_PLL_BYPASS_ADDR, BIT0 | BIT4); A_DELAY_USECS(100); // wait for stable - HAL_WORD_REG_WRITE(MAGPIE_REG_CPU_PLL_ADDR, (BIT16)); + iowrite32(MAGPIE_REG_CPU_PLL_ADDR, BIT16); A_UART_HWINIT((40*1000*1000), 115200); @@ -132,9 +158,12 @@ void exception_reset(struct register_dump_s *dump) MAGPIE_REG_USB_RX1_SWAP_DATA = 0x1; MAGPIE_REG_USB_RX2_SWAP_DATA = 0x1; - A_PRINTF("Jump to BOOT\n"); - - // reboot..... + A_PRINTF("Cold reboot initiated."); +#if defined(PROJECT_MAGPIE) + iowrite32(WATCH_DOG_MAGIC_PATTERN_ADDR, 0); +#elif defined(PROJECT_K2) + iowrite32(MAGPIE_REG_RST_STATUS_ADDR, 0); +#endif /* #if defined(PROJECT_MAGPIE) */ A_USB_JUMP_BOOT(); } @@ -142,10 +171,10 @@ void reset_EP4_FIFO(void) { int i; - // reset EP4 FIFO - USB_BYTE_REG_WRITE(ZM_EP4_BYTE_COUNT_HIGH_OFFSET, (USB_BYTE_REG_READ(ZM_EP4_BYTE_COUNT_HIGH_OFFSET) | BIT4)); + /* reset EP4 FIFO */ + io8_set_usb(ZM_EP4_BYTE_COUNT_HIGH_OFFSET, BIT4); for(i = 0; i < 100; i++) {} - USB_BYTE_REG_WRITE(ZM_EP4_BYTE_COUNT_HIGH_OFFSET, (USB_BYTE_REG_READ(ZM_EP4_BYTE_COUNT_HIGH_OFFSET) & ~BIT4)); + io8_clr_usb(ZM_EP4_BYTE_COUNT_HIGH_OFFSET, BIT4); } LOCAL void zfGenExceptionEvent(uint32_t exccause, uint32_t pc, uint32_t badvaddr) @@ -155,12 +184,12 @@ LOCAL void zfGenExceptionEvent(uint32_t exccause, uint32_t pc, uint32_t badvaddr A_PRINTF("Tgt Drv send an event 44332211 to Host Drv\n"); mUSB_STATUS_IN_INT_DISABLE(); - USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0x0f); + iowrite32_usb(ZM_CBUS_FIFO_SIZE_OFFSET, 0x0f); - USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, pattern); - USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, exccause); - USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, pc); - USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, badvaddr); + iowrite32_usb(ZM_EP3_DATA_OFFSET, pattern); + iowrite32_usb(ZM_EP3_DATA_OFFSET, exccause); + iowrite32_usb(ZM_EP3_DATA_OFFSET, pc); + iowrite32_usb(ZM_EP3_DATA_OFFSET, badvaddr); mUSB_EP3_XFER_DONE(); } @@ -172,10 +201,10 @@ LOCAL void zfGenWrongEpidEvent(uint32_t epid) A_PRINTF("Tgt Drv send an event 44332212 to Host Drv\n"); mUSB_STATUS_IN_INT_DISABLE(); - USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0x0f); + iowrite32_usb(ZM_CBUS_FIFO_SIZE_OFFSET, 0x0f); - USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, pattern); - USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, epid); + iowrite32_usb(ZM_EP3_DATA_OFFSET, pattern); + iowrite32_usb(ZM_EP3_DATA_OFFSET, epid); mUSB_EP3_XFER_DONE(); } @@ -184,7 +213,6 @@ void AR6002_fatal_exception_handler_patch(CPU_exception_frame_t *exc_frame) { struct register_dump_s dump; - void (*reset_func)(void) = (void*)(RESET_VECTOR_ADDRESS); uint32_t exc_cause, exc_vaddr; asm volatile("rsr %0,%1" : "=r" (exc_cause) : "n" (EXCCAUSE)); asm volatile("rsr %0,%1" : "=r" (exc_vaddr) : "n" (EXCVADDR)); @@ -319,18 +347,11 @@ static void idle_task() return; } -void wlan_task(void) +void __noreturn wlan_task(void) { loop_low=loop_high=0; while(1) { -#if defined(PROJECT_MAGPIE) - if (bJumptoFlash){ - bJumptoFlash = FALSE; - break; - } -#endif - /* update wdt timer */ A_WDT_TASK(); @@ -346,17 +367,9 @@ void wlan_task(void) A_TASKLET_RUN(); A_TIMER_RUN(); - /* Low priority tasks */ - if ((loop_low & 0xf) == 0) { - } - /* Very low priority tasks */ - if ((loop_low & 0xfff) == 0x7) { - if ((loop_low & 0x1000) == 0) { - A_DBG_TASK(); - } else { - } - } + if ((loop_low & 0x1fff) == 0x7) + A_DBG_TASK(); idle_task(); }