X-Git-Url: https://jxself.org/git/?a=blobdiff_plain;f=target_firmware%2Fmagpie_fw_dev%2Ftarget%2Fhif%2Fusb_api_main_patch.c;h=f6be408b14d41b72d430f9003cf064129efee1b4;hb=75734d969120c0f5c9b532913032d3f2e88583a9;hp=5daf1766447bf3fd311b192b1504436d059748b3;hpb=a595388aceac29334b75c1fd83b074991897cc54;p=open-ath9k-htc-firmware.git diff --git a/target_firmware/magpie_fw_dev/target/hif/usb_api_main_patch.c b/target_firmware/magpie_fw_dev/target/hif/usb_api_main_patch.c index 5daf176..f6be408 100644 --- a/target_firmware/magpie_fw_dev/target/hif/usb_api_main_patch.c +++ b/target_firmware/magpie_fw_dev/target/hif/usb_api_main_patch.c @@ -14,6 +14,7 @@ #define USB_EP3_MAX_PKT_SIZE bUSB_EP_MAX_PKT_SIZE_64 extern USB_FIFO_CONFIG usbFifoConf; +extern Action eUsbCxFinishAction; void cold_reboot(void) { @@ -26,6 +27,80 @@ void cold_reboot(void) A_USB_JUMP_BOOT(); } +/* + * support more than 64 bytes command on ep3 + */ +void usb_status_in_patch(void) +{ + uint16_t count; + uint16_t remainder; + uint16_t reg_buf_len; + static uint16_t buf_len; + static VBUF *evntbuf = NULL; + static volatile uint32_t *regaddr; + static BOOLEAN cmd_is_new = TRUE; + BOOLEAN cmd_end = FALSE; + + if (cmd_is_new) { + evntbuf = usbFifoConf.get_event_buf(); + if (evntbuf != NULL) { + regaddr = (uint32_t *)VBUF_GET_DATA_ADDR(evntbuf); + buf_len = evntbuf->buf_length; + } else { + mUSB_STATUS_IN_INT_DISABLE(); + return; + } + + cmd_is_new = FALSE; + } + + if (buf_len > USB_EP3_MAX_PKT_SIZE) { + reg_buf_len = USB_EP3_MAX_PKT_SIZE; + buf_len -= USB_EP3_MAX_PKT_SIZE; + } + /* TODO: 64 bytes... + * controller supposed will take care of zero-length? */ + else { + reg_buf_len = buf_len; + cmd_end = TRUE; + } + + /* INT use EP3 */ + for (count = 0; count < (reg_buf_len / 4); count++) + { + USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, *regaddr); + regaddr++; + } + + remainder = reg_buf_len % 4; + + if (remainder) { + switch(remainder) { + case 3: + USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0x7); + break; + case 2: + USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0x3); + break; + case 1: + USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0x1); + break; + } + + USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, *regaddr); + + /* Restore CBus FIFO size to word size */ + USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0xF); + } + + mUSB_EP3_XFER_DONE(); + + if (evntbuf != NULL && cmd_end) { + usbFifoConf.send_event_done(evntbuf); + cmd_is_new = TRUE; + } +} + /* * support more than 64 bytes command on ep4 */ @@ -125,3 +200,150 @@ done: ; } +/* + * usb1.1 ep6 fix + * TODO: + * - theoretically ep6 configured same way as ep1 + * so, if there are some problems we should have it + * there too. + * - do we really need support usb1.1? + */ +extern uint16_t u8UsbConfigValue; +extern uint16_t u8UsbInterfaceValue; +extern uint16_t u8UsbInterfaceAlternateSetting; +extern SetupPacket ControlCmd; +extern void vUsbClrEPx(void); + +#undef FS_C1_I0_A0_EP_NUMBER +#define FS_C1_I0_A0_EP_NUMBER 6 + +#define FS_C1_I0_A0_EP6_BLKSIZE BLK512BYTE +#define FS_C1_I0_A0_EP6_BLKNO DOUBLE_BLK +#define FS_C1_I0_A0_EP6_DIRECTION DIRECTION_OUT +#define FS_C1_I0_A0_EP6_TYPE TF_TYPE_BULK +#define FS_C1_I0_A0_EP6_MAX_PACKET 0x0040 +#define FS_C1_I0_A0_EP6_bInterval 0 + +/* EP6 */ +#define FS_C1_I0_A0_EP6_FIFO_START \ + (FS_C1_I0_A0_EP5_FIFO_START + FS_C1_I0_A0_EP5_FIFO_NO) +#define FS_C1_I0_A0_EP6_FIFO_NO \ + (FS_C1_I0_A0_EP6_BLKNO * FS_C1_I0_A0_EP6_BLKSIZE) +#define FS_C1_I0_A0_EP6_FIFO_CONFIG \ + (0x80 | ((FS_C1_I0_A0_EP6_BLKSIZE - 1) << 4) | \ + ((FS_C1_I0_A0_EP6_BLKNO - 1) << 2) | FS_C1_I0_A0_EP6_TYPE) +#define FS_C1_I0_A0_EP6_FIFO_MAP \ + (((1 - FS_C1_I0_A0_EP6_DIRECTION) << 4) | EP6) +#define FS_C1_I0_A0_EP6_MAP \ + (FS_C1_I0_A0_EP6_FIFO_START | (FS_C1_I0_A0_EP6_FIFO_START << 4) | \ + (MASK_F0 >> (4*FS_C1_I0_A0_EP6_DIRECTION))) + +void vUSBFIFO_EP6Cfg_FS_patch(void) +{ +#if (FS_C1_I0_A0_EP_NUMBER >= 6) + int i; + + /* EP0X06 */ + mUsbEPMap(EP6, FS_C1_I0_A0_EP6_MAP); + mUsbFIFOMap(FS_C1_I0_A0_EP6_FIFO_START, FS_C1_I0_A0_EP6_FIFO_MAP); + mUsbFIFOConfig(FS_C1_I0_A0_EP6_FIFO_START, FS_C1_I0_A0_EP6_FIFO_CONFIG); + + for(i = FS_C1_I0_A0_EP6_FIFO_START + 1 ; + i < FS_C1_I0_A0_EP6_FIFO_START + FS_C1_I0_A0_EP6_FIFO_NO ; i ++) + { + mUsbFIFOConfig(i, (FS_C1_I0_A0_EP6_FIFO_CONFIG & (~BIT7)) ); + } + + mUsbEPMxPtSzHigh(EP6, FS_C1_I0_A0_EP6_DIRECTION, + (FS_C1_I0_A0_EP6_MAX_PACKET & 0x7ff)); + mUsbEPMxPtSzLow(EP6, FS_C1_I0_A0_EP6_DIRECTION, + (FS_C1_I0_A0_EP6_MAX_PACKET & 0x7ff)); + mUsbEPinHighBandSet(EP6, FS_C1_I0_A0_EP6_DIRECTION, + FS_C1_I0_A0_EP6_MAX_PACKET); +#endif +} + +void vUsbFIFO_EPxCfg_FS_patch(void) +{ + switch (u8UsbConfigValue) + { +#if (FS_CONFIGURATION_NUMBER >= 1) + /* Configuration 0X01 */ + case 0X01: + switch (u8UsbInterfaceValue) + { +#if (FS_C1_INTERFACE_NUMBER >= 1) + /* Interface 0 */ + case 0: + switch (u8UsbInterfaceAlternateSetting) + { + +#if (FS_C1_I0_ALT_NUMBER >= 1) + /* AlternateSetting 0 */ + case 0: + + /* snapped.... */ + + /* patch up this ep6_fs config */ + vUSBFIFO_EP6Cfg_FS_patch(); + + break; + +#endif + default: + break; + } + break; +#endif + default: + break; + } + break; +#endif + default: + break; + } + /* mCHECK_STACK(); */ +} + +BOOLEAN bSet_configuration_patch(void) +{ + /* do some defaul configuration */ + bSet_configuration(); + + /* overwrite defaul FIFO configuration for FullSpeed USB */ + if ((mLOW_BYTE(mDEV_REQ_VALUE()) != 0) && !mUsbHighSpeedST()) + vUsbFIFO_EPxCfg_FS_patch(); + + eUsbCxFinishAction = ACT_DONE; + return TRUE; +} + +extern BOOLEAN bStandardCommand(void); + +BOOLEAN bStandardCommand_patch(void) +{ + if (mDEV_REQ_REQ() == USB_SET_CONFIGURATION) { + A_USB_SET_CONFIG(); + +#if ENABLE_SWAP_DATA_MODE + /* SWAP FUNCTION should be enabled while DMA engine + * is not working, the best place to enable it + * is before we trigger the DMA */ + MAGPIE_REG_USB_RX0_SWAP_DATA = 0x1; + MAGPIE_REG_USB_TX0_SWAP_DATA = 0x1; + +#if SYSTEM_MODULE_HP_EP5 + MAGPIE_REG_USB_RX1_SWAP_DATA = 0x1; +#endif + +#if SYSTEM_MODULE_HP_EP6 + MAGPIE_REG_USB_RX2_SWAP_DATA = 0x1; +#endif + +#endif /* ENABLE_SWAP_DATA_MODE */ + return TRUE; + } else + return bStandardCommand(); +} +