X-Git-Url: https://jxself.org/git/?a=blobdiff_plain;f=include%2Fshared%2Fphy.h;h=02c34eb4ebdec5fe64eb0730e24e89393c8f800f;hb=1999e162e83656d48ede992f37923c6efa85b123;hp=6291fb2f059532ddcf6bf0c85d0b541aaf9bcbd5;hpb=36e4dffb0cfd83cefe28606eb6f5574f8922e580;p=carl9170fw.git

diff --git a/include/shared/phy.h b/include/shared/phy.h
index 6291fb2..02c34eb 100644
--- a/include/shared/phy.h
+++ b/include/shared/phy.h
@@ -1,4 +1,8 @@
 /*
+ * Shared Atheros AR9170 Header
+ *
+ * PHY register map
+ *
  * Copyright (c) 2008-2009 Atheros Communications Inc.
  *
  * Permission to use, copy, modify, and/or distribute this software for any
@@ -419,8 +423,8 @@
 #define		AR9170_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV	0x2000
 #define		AR9170_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV_S	13
 
-#define	AR9170_PHY_REG_GAIN_2GHZ_CHAIN_2	(AR9170_PHY_REG_BASE + 0x2a0c)
 #define	AR9170_PHY_REG_GAIN_2GHZ		(AR9170_PHY_REG_BASE + 0x0a0c)
+#define	AR9170_PHY_REG_GAIN_2GHZ_CHAIN_2	(AR9170_PHY_REG_BASE + 0x2a0c)
 #define		AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN	0x00fc0000
 #define		AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN_S	18
 #define		AR9170_PHY_GAIN_2GHZ_BSW_MARGIN		0x00003c00
@@ -557,7 +561,4 @@
 #define		AR9170_PHY_CH2_EXT_MINCCA_PWR		0xff800000
 #define		AR9170_PHY_CH2_EXT_MINCCA_PWR_S		23
 
-#define	REDUCE_CHAIN_0 0x00000050
-#define	REDUCE_CHAIN_1 0x00000051
-
 #endif	/* __CARL9170_SHARED_PHY_H */