X-Git-Url: https://jxself.org/git/?a=blobdiff_plain;f=carlfw%2Fsrc%2Fmain.c;h=b9239c8e4969b5fcf5ca3dcc437886d8a613bb47;hb=39be7dc384e0dd45dc36b4b517fd9fae874b06f0;hp=9500c0d26720bcb4d43f409e790048669788ae01;hpb=0eb34487ee8e70ecb8e4ee2ed5092b2788eb7f26;p=carl9170fw.git diff --git a/carlfw/src/main.c b/carlfw/src/main.c index 9500c0d..b9239c8 100644 --- a/carlfw/src/main.c +++ b/carlfw/src/main.c @@ -32,6 +32,18 @@ #define AR9170_WATCH_DOG_TIMER 0x100 +static void timer_init(const unsigned int timer, const unsigned int interval) +{ + /* Set timer to periodic mode */ + orl(AR9170_TIMER_REG_CONTROL, BIT(timer)); + + /* Set time interval */ + set(AR9170_TIMER_REG_TIMER0 + (timer << 2), interval - 1); + + /* Clear timer interrupt flag */ + orl(AR9170_TIMER_REG_INTERRUPT, BIT(timer)); +} + static void init(void) { led_init(); @@ -85,6 +97,44 @@ static void handle_fw(void) reboot(); } +static void timer0_isr(void) +{ + wlan_timer(); + +#ifdef CONFIG_CARL9170FW_GPIO_INTERRUPT + gpio_timer(); +#endif /* CONFIG_CARL9170FW_GPIO_INTERRUPT */ + +#ifdef CONFIG_CARL9170FW_DEBUG_LED_HEARTBEAT + set(AR9170_GPIO_REG_PORT_DATA, get(AR9170_GPIO_REG_PORT_DATA) ^ 1); +#endif /* CONFIG_CARL9170FW_DEBUG_LED_HEARTBEAT */ +} + +static void handle_timer(void) +{ + uint32_t intr; + + intr = get(AR9170_TIMER_REG_INTERRUPT); + + /* ACK timer interrupt */ + set(AR9170_TIMER_REG_INTERRUPT, intr); + +#define HANDLER(intr, flag, func) \ + do { \ + if ((intr & flag) != 0) { \ + intr &= ~flag; \ + func(); \ + } \ + } while (0) + + HANDLER(intr, BIT(0), timer0_isr); + + if (intr) + DBG("Unhandled Timer Event %x", (unsigned int) intr); + +#undef HANDLER +} + static void __noreturn main_loop(void) { /* main loop */ @@ -109,8 +159,8 @@ static void __noreturn main_loop(void) /* * The bootcode will work with the device driver to load the firmware - * onto the device's Program SRAM. The Program SRAM has a size of 32 KB - * and also contains the stack, which grows down from 0x208000. + * onto the device's Program SRAM. The Program SRAM has a size of 16 KB + * and also contains the stack, which grows down from 0x204000. * * The Program SRAM starts at address 0x200000 on the device. * The firmware entry point (0x200004) is located in boot.S.