X-Git-Url: https://jxself.org/git/?a=blobdiff_plain;f=carlfw%2Fsrc%2Fmain.c;h=0653ae44dde34bb8be28d9061b014a8c7d298c6c;hb=75bc8a0282106f10e82c3bccd29fe1f18344d034;hp=9500c0d26720bcb4d43f409e790048669788ae01;hpb=0eb34487ee8e70ecb8e4ee2ed5092b2788eb7f26;p=carl9170fw.git

diff --git a/carlfw/src/main.c b/carlfw/src/main.c
index 9500c0d..0653ae4 100644
--- a/carlfw/src/main.c
+++ b/carlfw/src/main.c
@@ -6,7 +6,7 @@
  * Copyright (c) 2000-2005 ZyDAS Technology Corporation
  * Copyright (c) 2007-2009 Atheros Communications, Inc.
  * Copyright	2009	Johannes Berg <johannes@sipsolutions.net>
- * Copyright 2009, 2010 Christian Lamparter <chunkeey@googlemail.com>
+ * Copyright 2009-2011	Christian Lamparter <chunkeey@googlemail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -29,9 +29,22 @@
 #include "printf.h"
 #include "gpio.h"
 #include "wl.h"
+#include "usb.h"
 
 #define AR9170_WATCH_DOG_TIMER		   0x100
 
+static void timer_init(const unsigned int timer, const unsigned int interval)
+{
+	/* Set timer to periodic mode */
+	orl(AR9170_TIMER_REG_CONTROL, BIT(timer));
+
+	/* Set time interval */
+	set(AR9170_TIMER_REG_TIMER0 + (timer << 2), interval - 1);
+
+	/* Clear timer interrupt flag */
+	orl(AR9170_TIMER_REG_INTERRUPT, BIT(timer));
+}
+
 static void init(void)
 {
 	led_init();
@@ -58,14 +71,9 @@ static void init(void)
 	orl(AR9170_MAC_REG_AFTER_PNP, 1);
 
 	/* Init watch dog control flag */
-#ifdef CONFIG_CARL9170FW_WATCHDOG
 	fw.watchdog_enable = 1;
 
 	set(AR9170_TIMER_REG_WATCH_DOG, AR9170_WATCH_DOG_TIMER);
-#else
-	fw.watchdog_enable = 0;
-	set(AR9170_TIMER_REG_WATCH_DOG, 0xffff);
-#endif /* CONFIG_CARL9170FW_WATCHDOG */
 
 #ifdef CONFIG_CARL9170FW_GPIO_INTERRUPT
 	fw.cached_gpio_state.gpio = get(AR9170_GPIO_REG_PORT_DATA) &
@@ -85,6 +93,44 @@ static void handle_fw(void)
 		reboot();
 }
 
+static void timer0_isr(void)
+{
+	wlan_timer();
+
+#ifdef CONFIG_CARL9170FW_GPIO_INTERRUPT
+	gpio_timer();
+#endif /* CONFIG_CARL9170FW_GPIO_INTERRUPT */
+
+#ifdef CONFIG_CARL9170FW_DEBUG_LED_HEARTBEAT
+	set(AR9170_GPIO_REG_PORT_DATA, get(AR9170_GPIO_REG_PORT_DATA) ^ 1);
+#endif /* CONFIG_CARL9170FW_DEBUG_LED_HEARTBEAT */
+}
+
+static void handle_timer(void)
+{
+	uint32_t intr;
+
+	intr = get(AR9170_TIMER_REG_INTERRUPT);
+
+	/* ACK timer interrupt */
+	set(AR9170_TIMER_REG_INTERRUPT, intr);
+
+#define HANDLER(intr, flag, func)			\
+	do {						\
+		if ((intr & flag) != 0) {		\
+			intr &= ~flag;			\
+			func();				\
+		}					\
+	} while (0)
+
+	HANDLER(intr, BIT(0), timer0_isr);
+
+	if (intr)
+		DBG("Unhandled Timer Event %x", (unsigned int) intr);
+
+#undef HANDLER
+}
+
 static void __noreturn main_loop(void)
 {
 	/* main loop */
@@ -109,8 +155,8 @@ static void __noreturn main_loop(void)
 
 /*
  * The bootcode will work with the device driver to load the firmware
- * onto the device's Program SRAM. The Program SRAM has a size of 32 KB
- * and also contains the stack, which grows down from 0x208000.
+ * onto the device's Program SRAM. The Program SRAM has a size of 16 KB
+ * and also contains the stack, which grows down from 0x204000.
  *
  * The Program SRAM starts at address 0x200000 on the device.
  * The firmware entry point (0x200004) is located in boot.S.
@@ -119,7 +165,7 @@ static void __noreturn main_loop(void)
 
 void start(void)
 {
-	clock_set(true, AHB_40MHZ_OSC);
+	clock_set(AHB_40MHZ_OSC, true);
 
 	/* watchdog magic pattern check */
 	if ((get(AR9170_PWR_REG_WATCH_DOG_MAGIC) & 0xffff0000) == 0x12340000) {