X-Git-Url: https://jxself.org/git/?a=blobdiff_plain;f=carlfw%2Finclude%2Ftimer.h;h=d6497199fa0d88b867fdd248fa209dc7af58bcdd;hb=10280c74bd62f63b1483bf1b17d40b0eeb35845e;hp=8c3df1b224028eeab14a8c6ca449ce7cc9d8bdae;hpb=e72388a0aa23da8bc8e24a0cbe9d523c5a9ce294;p=carl9170fw.git

diff --git a/carlfw/include/timer.h b/carlfw/include/timer.h
index 8c3df1b..d649719 100644
--- a/carlfw/include/timer.h
+++ b/carlfw/include/timer.h
@@ -35,46 +35,66 @@ enum cpu_clock_t {
 	AHB_80_88MHZ    = 3
 };
 
-#define AR9170_TICKS_PER_MICROSECOND	80
-
-void handle_timer(void);
-void timer_init(const unsigned int timer, const unsigned int interval);
-void clock_set(const bool on, const enum cpu_clock_t _clock);
-
 static inline __inline uint32_t get_clock_counter(void)
 {
 	return (get(AR9170_TIMER_REG_CLOCK_HIGH) << 16) | get(AR9170_TIMER_REG_CLOCK_LOW);
 }
 
-static inline __inline bool is_after_msecs(uint32_t t0, uint32_t msecs)
+/*
+ * works only up to 97 secs [44 MHz] or 107 secs for 40 MHz
+ * Also, the delay wait will be affected by 2.4GHz<->5GHz
+ * band changes.
+ */
+static inline __inline bool is_after_msecs(const uint32_t t0, const uint32_t msecs)
 {
-	return (get_clock_counter() - t0) / (AR9170_TICKS_PER_MICROSECOND * 1000) > msecs;
+	return ((get_clock_counter() - t0) / 1000) > (msecs * fw.ticks_per_msec);
 }
 
-static inline __inline void delay(uint32_t msec)
+/*
+ * Note: Be careful with [u]delay. They won't service the
+ * hardware watchdog timer. It might trigger if you
+ * wait long enough. Also they don't terminate if sec is
+ * above 97 sec [44MHz] or more than 107 sec [40MHz].
+ */
+static inline __inline void delay(const uint32_t msec)
 {
-	uint32_t t1, t2, dt;
+	uint32_t t1, t2, dt, wt;
+
+	wt = msec * fw.ticks_per_msec;
 
 	t1 = get_clock_counter();
 	while (1) {
 		t2 = get_clock_counter();
-		dt = (t2 - t1) / AR9170_TICKS_PER_MICROSECOND / 1000;
-		if (dt >= msec)
+		dt = (t2 - t1) / 1000;
+		if (dt >= wt)
 			break;
 	}
 }
 
-static inline __inline void udelay(uint32_t usec)
+static inline __inline void udelay(const uint32_t usec)
 {
 	uint32_t t1, t2, dt;
 
 	t1 = get_clock_counter();
 	while (1) {
 		t2 = get_clock_counter();
-		dt = (t2 - t1) / AR9170_TICKS_PER_MICROSECOND;
-		if (dt >= usec)
+		dt = (t2 - t1);
+		if (dt >= (usec * fw.ticks_per_msec))
 			break;
 	}
 }
 
+static inline void clock_set(enum cpu_clock_t _clock, bool on)
+{
+	/*
+	 * Word of Warning!
+	 * This setting does more than just mess with the CPU Clock.
+	 * So watch out, if you need _stable_ timer interrupts.
+	 */
+
+	fw.ticks_per_msec = GET_VAL(AR9170_PWR_PLL_ADDAC_DIV, get(AR9170_PWR_REG_PLL_ADDAC)) >> 1;
+
+	set(AR9170_PWR_REG_CLOCK_SEL, (uint32_t) ((on ? 0x70 : 0x600) | _clock));
+}
+
 #endif /* __CARL9170FW_TIMER_H */