X-Git-Url: https://jxself.org/git/?a=blobdiff_plain;ds=sidebyside;f=carlfw%2Fsrc%2Ftimer.c;h=14c00e6aad491295f53ca79d077dc0285f95ed7e;hb=c1d4716037319ad03fa29cbe56d7cb8c3af67472;hp=7cbd196dbb65ff716c9c0ae350ecd10b179b8d99;hpb=2cb1f03e4cf246a6254c71d84dc00435057fe09e;p=carl9170fw.git diff --git a/carlfw/src/timer.c b/carlfw/src/timer.c index 7cbd196..14c00e6 100644 --- a/carlfw/src/timer.c +++ b/carlfw/src/timer.c @@ -41,23 +41,6 @@ void timer_init(const unsigned int timer, const unsigned int interval) orl(AR9170_TIMER_REG_INTERRUPT, BIT(timer)); } -static void clock_calibrate(void) -{ - uint32_t t0, loop = 13; - - t0 = get_clock_counter(); - - /* - * TODO: - * Write this code in assembler, so the reading is accurate - * and can be used to correct the timer intervals. - */ - while (((get_clock_counter() - t0) & (BIT(18)-1)) < 1000) - loop += 9; /* really rough uOP estimation */ - - fw.bogoclock = loop; -} - void clock_set(const bool on, const enum cpu_clock_t _clock) { /* @@ -67,7 +50,6 @@ void clock_set(const bool on, const enum cpu_clock_t _clock) */ set(AR9170_PWR_REG_CLOCK_SEL, (uint32_t) ((on ? 0x70 : 0x600) | _clock)); - clock_calibrate(); } static void timer0_isr(void)