static void ath_tx_tgt_setds(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
{
struct ath_tx_desc *ds = bf->bf_desc;
+ struct ath_hal *ah = sc->sc_ah;
switch (bf->bf_protmode) {
case IEEE80211_PROT_RTSCTS:
break;
}
- ath_hal_set11n_txdesc(sc->sc_ah, ds
+ ah->ah_set11nTxDesc(ah, ds
, bf->bf_pktlen
, bf->bf_atype
, 60
rtsctsrate = rt->info[cix].rateCode |
(bf->bf_shpream ? rt->info[cix].shortPreamble : 0);
- ath_hal_set11n_ratescenario(ah, ds, 1,
+ ah->ah_set11nRateScenario(ah, ds, 1,
rtsctsrate, ctsduration,
series, 4,
flags);
static void owltgt_tx_process_cabq(struct ath_softc_tgt *sc, struct ath_txq *txq)
{
- ath_hal_intrset(sc->sc_ah, sc->sc_imask & ~HAL_INT_SWBA);
+ struct ath_hal *ah = sc->sc_ah;
+ ah->ah_setInterrupts(ah, sc->sc_imask & ~HAL_INT_SWBA);
owltgt_tx_processq(sc, txq, OWL_TXQ_ACTIVE);
- ath_hal_intrset(sc->sc_ah, sc->sc_imask);
+ ah->ah_setInterrupts(ah, sc->sc_imask);
}
void owl_tgt_tx_tasklet(TQUEUE_ARG data)
}
txq->axq_link = &bf->bf_lastds->ds_link;
- ath_hal_txstart(ah, txq->axq_qnum);
+ ah->ah_startTxDma(ah, txq->axq_qnum);
}
static a_int32_t ath_tgt_txbuf_setup(struct ath_softc_tgt *sc,
series[i].ChSel = sc->sc_ic.ic_tx_chainmask;
series[i].RateFlags = 0;
}
- ath_hal_set11n_ratescenario(ah, ds, 0, ctsrate, ctsduration, series, 4, 0);
+ ah->ah_set11nRateScenario(ah, ds, 0, ctsrate, ctsduration, series, 4, 0);
ath_tgt_txqaddbuf(sc, txq, bf, bf->bf_lastds);
return;
}
txq->axq_link = &lastds->ds_link;
- ath_hal_txstart(ah, txq->axq_qnum);
+ ah->ah_startTxDma(ah, txq->axq_qnum);
}
void ath_tgt_handle_normal(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
ath_tx_bufhead bf_q;
struct ath_txq *txq = TID_TO_ACTXQ(tid->tidno);
struct ath_tx_desc *ds = NULL;
+ struct ath_hal *ah = sc->sc_ah;
int i;
bf->bf_isaggr = 1;
ath_buf_set_rate(sc, bf);
- ath_hal_set11n_aggr_first(sc->sc_ah, bf->bf_desc, bf->bf_al,
+ ah->ah_set11nAggrFirst(ah, bf->bf_desc, bf->bf_al,
bf->bf_ndelim);
bf->bf_lastds = bf_last->bf_lastds;
int nframes = 0, rl = 0;;
struct ath_tx_desc *ds = NULL;
struct ath_tx_buf *bf;
+ struct ath_hal *ah = sc->sc_ah;
u_int16_t aggr_limit = (64*1024 -1), al = 0, bpad = 0, al_delta;
u_int16_t h_baw = tid->baw_size/2, prev_al = 0, prev_frames = 0;
bf_prev = bf;
for(ds = bf->bf_desc; ds <= bf->bf_lastds; ds++)
- ath_hal_set11n_aggr_middle(sc->sc_ah, ds, bf->bf_ndelim);
+ ah->ah_set11nAggrMiddle(ah, ds, bf->bf_ndelim);
} while (!asf_tailq_empty(&tid->buf_q));
struct ieee80211_frame_bar *bar;
u_int8_t min_rate;
struct ath_tx_desc *ds, *ds0;
+ struct ath_hal *ah = sc->sc_ah;
HAL_11N_RATE_SERIES series[4];
int i = 0;
adf_nbuf_queue_t skbhead;
series[i].ChSel = sc->sc_ic.ic_tx_chainmask;
}
- ath_hal_set11n_ratescenario(sc->sc_ah, bf->bf_desc, 0, 0, 0, series, 4, 4);
+ ah->ah_set11nRateScenario(ah, bf->bf_desc, 0, 0, 0, series, 4, 4);
ath_tgt_txq_add_ucast(sc, bf);
}