return duration;
}
-static void ath_dma_map(struct ath_softc_tgt *sc, struct ath_buf *bf)
+static void ath_dma_map(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
{
adf_nbuf_t skb = bf->bf_skb;
adf_nbuf_map(sc->sc_dev, bf->bf_dmamap, skb, ADF_OS_DMA_TO_DEVICE);
}
-static void ath_dma_unmap(struct ath_softc_tgt *sc, struct ath_buf *bf)
+static void ath_dma_unmap(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
{
adf_nbuf_t skb = bf->bf_skb;
HAL_11N_RATE_SERIES series[4];
a_int32_t i, flags;
a_uint8_t rix, cix, rtsctsrate;
- a_uint32_t aggr_limit_with_rts;
a_uint32_t ctsduration = 0;
a_int32_t prot_mode = AH_FALSE;
}
}
- ath_hal_getrtsaggrlimit(sc->sc_ah, &aggr_limit_with_rts);
-
- if (bf->bf_isaggr && aggr_limit_with_rts &&
- bf->bf_al > aggr_limit_with_rts) {
- flags &= ~(HAL_TXDESC_RTSENA);
- }
-
adf_os_mem_set(series, 0, sizeof(HAL_11N_RATE_SERIES) * 4);
for (i = 0; i < 4; i++) {
}
}
-struct WMI_TXSTATUS_EVENT* ath_tx_status_get(struct ath_softc_tgt *sc)
+static WMI_TXSTATUS_EVENT *ath_tx_status_get(struct ath_softc_tgt *sc)
{
WMI_TXSTATUS_EVENT *txs = NULL;
int i;
ath_tgt_rate_findrate(sc, an, shortPreamble,
0, 0, 0, 0, 0,
rcs, &isProbe);
- memcpy(bf->bf_rcs, rcs, sizeof(rcs));
+ ath_hal_memcpy(bf->bf_rcs, rcs, sizeof(rcs));
} else {
mrcs[1].tries = mrcs[2].tries = mrcs[3].tries = 0;
mrcs[1].rix = mrcs[2].rix = mrcs[3].rix = 0;
mrcs[0].rix = 0;
mrcs[0].tries = 1;
mrcs[0].flags = 0;
- memcpy(bf->bf_rcs, mrcs, sizeof(mrcs));
+ ath_hal_memcpy(bf->bf_rcs, mrcs, sizeof(mrcs));
}
ath_buf_set_rate(sc, bf);