*/
static u_int64_t ath_extend_tsf(struct ath_softc_tgt *sc, u_int32_t rstamp)
{
+ struct ath_hal *ah = sc->sc_ah;
u_int64_t tsf;
u_int32_t tsf_low;
u_int64_t tsf64;
- tsf = ath_hal_gettsf64(sc->sc_ah);
+ tsf = ah->ah_getTsf64(ah);
tsf_low = tsf & 0xffffffff;
tsf64 = (tsf & ~0xffffffffULL) | rstamp;
0);
if (sc->sc_rxlink == NULL) {
- ath_hal_putrxbuf(ah, ds->ds_daddr);
+ ah->ah_setRxDP(ah, ds->ds_daddr);
}
else {
*sc->sc_rxlink = ds->ds_daddr;
}
sc->sc_rxlink = &ds->ds_link;
- ath_hal_rxena(ah);
+ ah->ah_enableReceive(ah);
return 0;
}
((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \
((_pa) - (_sc)->sc_rxdma.dd_desc_paddr)))
- tsf = ath_hal_gettsf64(ah);
+ tsf = ah->ah_getTsf64(ah);
bf = asf_tailq_first(&sc->sc_rxbuf);
ds = asf_tailq_first(&sc->sc_rxdesc);
}
ds = asf_tailq_first(&sc->sc_rxdesc);
- ath_hal_putrxbuf(ah, ds->ds_daddr);
+ ah->ah_setRxDP(ah, ds->ds_daddr);
return 0;
}
} while(1);
sc->sc_imask |= HAL_INT_RX;
- ath_hal_intrset(ah, sc->sc_imask);
+ ah->ah_setInterrupts(ah, sc->sc_imask);
}
/*******************/
series[0].Rate = rate;
series[0].ChSel = sc->sc_ic.ic_tx_chainmask;
series[0].RateFlags = 0;
- ath_hal_set11n_ratescenario(ah, ds, 0, 0, 0, series, 4, 0);
+ ah->ah_set11nRateScenario(ah, ds, 0, 0, 0, series, 4, 0);
}
static void ath_tgt_send_beacon(struct ath_softc_tgt *sc, adf_nbuf_t bc_hdr,
a_uint32_t tmp;
#ifdef ATH_ENABLE_CABQ
- tsf = ath_hal_gettsf64(ah);
+ tsf = ah->ah_getTsf64(ah);
tmp = tsf - sc->sc_swba_tsf;
if ( tmp > ATH_CABQ_HANDLING_THRESHOLD ) {
if (sc->sc_invalid)
return ADF_OS_IRQ_NONE;
- if (!ath_hal_intrpend(ah))
+ if (!ah->ah_isInterruptPending(ah))
return ADF_OS_IRQ_NONE;
- ath_hal_getisr(ah, &status);
+ ah->ah_getPendingInterrupts(ah, &status);
status &= sc->sc_imask;
if (status & HAL_INT_FATAL) {
- ath_hal_intrset(ah, 0);
+ ah->ah_setInterrupts(ah, 0);
ATH_SCHEDULE_TQUEUE(sc->sc_dev, &sc->sc_fataltq);
} else {
if (status & HAL_INT_SWBA) {
WMI_SWBA_EVENT swbaEvt;
struct ath_txq *txq = ATH_TXQ(sc, 8);
- swbaEvt.tsf = ath_hal_gettsf64(ah);
+ swbaEvt.tsf = ah->ah_getTsf64(ah);
swbaEvt.beaconPendingCount = ah->ah_numTxPending(ah, sc->sc_bhalq);
- sc->sc_swba_tsf = ath_hal_gettsf64(ah);
+ sc->sc_swba_tsf = ah->ah_getTsf64(ah);
wmi_event(sc->tgt_wmi_handle,
WMI_SWBA_EVENTID,
ath_uapsd_processtriggers(sc);
sc->sc_imask &= ~HAL_INT_RX;
- ath_hal_intrset(ah, sc->sc_imask);
+ ah->ah_setInterrupts(ah, sc->sc_imask);
ATH_SCHEDULE_TQUEUE(sc->sc_dev, &sc->sc_rxtq);
}
sc->sc_imask |= HAL_INT_BMISS;
}
- ath_hal_intrset(ah, sc->sc_imask);
+ ah->ah_setInterrupts(ah, sc->sc_imask);
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo,NULL, 0);
}
sc->sc_imask |= HAL_INT_CST;
adf_os_setup_intr(sc->sc_dev, ath_intr);
- ath_hal_intrset(ah, sc->sc_imask);
+ ah->ah_setInterrupts(ah, sc->sc_imask);
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo, NULL, 0);
}
struct ath_softc_tgt *sc = (struct ath_softc_tgt *)Context;
struct ath_hal *ah = sc->sc_ah;
- ath_hal_intrset(ah, 0);
+ ah->ah_setInterrupts(ah, 0);
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo,NULL, 0);
}
struct ath_softc_tgt *sc = (struct ath_softc_tgt *)Context;
struct ath_hal *ah = sc->sc_ah;
- ath_hal_stoppcurecv(ah);
- ath_hal_setrxfilter(ah, 0);
- ath_hal_stopdmarecv(ah);
+ ah->ah_stopPcuReceive(ah);
+ ah->ah_setRxFilter(ah, 0);
+ ah->ah_stopDmaReceive(ah);
sc->sc_rxlink = NULL;
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo, NULL, 0);
ath_tgt_txq_setup(sc);
sc->sc_imask =0;
- ath_hal_intrset(ah,0);
+ ah->ah_setInterrupts(ah, 0);
return 0;
bad: