#endif
#define AR5416_DEVID_PCIE 0x0024 /* AR5416 PCI-E (XB) (Owl) */
+#define HAL_RATE_TABLE_SIZE 33
typedef enum {
HAL_OK = 0, /* No error */
typedef struct {
a_int32_t rateCount;
- a_uint8_t rateCodeToIndex[32];
+ a_uint8_t rateCodeToIndex[HAL_RATE_TABLE_SIZE];
struct {
a_uint8_t valid;
a_uint8_t phy;
a_uint8_t controlRate;
a_uint16_t lpAckDuration;
a_uint16_t spAckDuration;
- } info[32];
+ } info[HAL_RATE_TABLE_SIZE];
} HAL_RATE_TABLE;
typedef struct {
typedef struct {
a_int32_t rateCount;
- a_uint8_t rateCodeToIndex[32];
+ a_uint8_t rateCodeToIndex[HAL_RATE_TABLE_SIZE];
struct {
a_uint8_t valid;
a_uint8_t phy;
a_uint8_t controlRate;
a_uint16_t lpAckDuration;
a_uint16_t spAckDuration;
- } info[32];
+ } info[HAL_RATE_TABLE_SIZE];
} HAL_RATE_TABLE;
#define HAL_RATESERIES_RTS_CTS 0x0001 /* use rts/cts w/this series */
{
a_uint32_t ah_magic;
HAL_SOFTC ah_sc;
- HAL_BUS_HANDLE ah_sh;
adf_os_device_t ah_dev;
a_uint32_t ah_macVersion;
/* Target receive Functions */
a_uint32_t __ahdecl(*ah_getRxDP)(struct ath_hal*);
void __ahdecl(*ah_setRxDP)(struct ath_hal*, a_uint32_t rxdp);
- HAL_BOOL __ahdecl(*ah_setupRxDesc)(struct ath_hal *, struct ath_desc *,
+ HAL_BOOL __ahdecl(*ah_setupRxDesc)(struct ath_hal *, struct ath_rx_desc *,
a_uint32_t size, a_uint32_t flags);
HAL_STATUS __ahdecl(*ah_procRxDesc)(struct ath_hal *, struct ath_desc *,
a_uint32_t phyAddr, struct ath_desc *next, u_int64_t tsf);
HAL_STATUS __ahdecl(*ah_procRxDescFast)(struct ath_hal *ah,
- struct ath_desc *ds, a_uint32_t pa,
+ struct ath_rx_desc *ds, a_uint32_t pa,
struct ath_desc *nds,
struct ath_rx_status *rx_stats);
HAL_BOOL __ahdecl(*ah_stopDmaReceive)(struct ath_hal*);
extern struct ath_hal * __ahdecl ath_hal_attach_tgt(a_uint32_t devid, HAL_SOFTC,
- adf_os_device_t dev, HAL_BUS_HANDLE sh,
+ adf_os_device_t dev,
a_uint32_t flags, HAL_STATUS* status);
extern const HAL_RATE_TABLE * __ahdecl ath_hal_getratetable(struct ath_hal *,