#define mADDR(addr) (*mpADDR(addr))
#define muADDR(addr) ((uint16_t) (&(addr)))
-#define USB_BYTE_REG_WRITE(addr, val) HAL_BYTE_REG_WRITE(USB_CTRL_BASE_ADDRESS|(uint8_t)(addr^3), (val))
-#define USB_BYTE_REG_READ(addr) HAL_BYTE_REG_READ(USB_CTRL_BASE_ADDRESS|(uint8_t)(addr^3))
-//#define USB_BYTE_REG_READ(addr) HAL_BYTE_REG_READ(USB_CTRL_BASE_ADDRESS|(uint8_t)(addr))
+#define USB_BYTE_REG_WRITE(addr, val) iowrite8_usb(addr, val)
+#define USB_BYTE_REG_READ(addr) ioread8_usb(addr)
-#define USB_HALF_WORD_REG_WRITE(addr, val) HAL_HALF_WORD_REG_WRITE(USB_CTRL_BASE_ADDRESS|(uint16_t)(addr), (val))
-#define USB_HALF_WORD_REG_READ(addr) HAL_HALF_WORD_REG_READ(USB_CTRL_BASE_ADDRESS|(uint16_t)(addr))
+#define USB_HALF_WORD_REG_WRITE(addr, val) iowrite16_usb(addr, val)
+#define USB_HALF_WORD_REG_READ(addr) ioread16_usb(addr)
-#define USB_WORD_REG_WRITE(addr, val) HAL_WORD_REG_WRITE(USB_CTRL_BASE_ADDRESS|(uint32_t)(addr), (val))
-#define USB_WORD_REG_READ(addr) HAL_WORD_REG_READ(USB_CTRL_BASE_ADDRESS|(uint32_t)(addr))
+#define USB_WORD_REG_WRITE(addr, val) iowrite32_usb(addr, val)
+#define USB_WORD_REG_READ(addr) ioread32_usb(addr)
/************************** Register Deinition ***************************/
#define ZM_ADDR_CONV 0x0
#define ZM_CBUS_FIFO_SIZE_REG (ZM_CBUS_FIFO_SIZE_OFFSET^ZM_ADDR_CONV)
-
+
#define ZM_CBUS_CTRL_REG (cSOC_USB_OFST+cSOC_CBUS_CTL_OFFSET^ZM_ADDR_CONV)
#define ZM_MAIN_CTRL_REG (ZM_MAIN_CTRL_OFFSET^ZM_ADDR_CONV)
#define ZM_INTR_SOURCE_2_REG (ZM_INTR_SOURCE_2_OFFSET^ZM_ADDR_CONV)
#define ZM_INTR_SOURCE_3_REG (ZM_INTR_SOURCE_3_OFFSET^ZM_ADDR_CONV)
-
+
#define ZM_INTR_SOURCE_4_REG (ZM_INTR_SOURCE_4_OFFSET^ZM_ADDR_CONV)
#define ZM_INTR_SOURCE_5_REG (ZM_INTR_SOURCE_5_OFFSET^ZM_ADDR_CONV)
USB_BYTE_REG_READ(ZM_MAIN_CTRL_OFFSET)&~BIT0)
#define mUsbRmWkupSet() USB_BYTE_REG_WRITE(ZM_MAIN_CTRL_OFFSET, \
USB_BYTE_REG_READ(ZM_MAIN_CTRL_OFFSET)|BIT0)
-
+
#define mUsbGlobIntEnable() USB_BYTE_REG_WRITE(ZM_MAIN_CTRL_OFFSET, \
USB_BYTE_REG_READ(ZM_MAIN_CTRL_OFFSET)|BIT2)
#if (HS_C1_INTERFACE_NUMBER >= 1)
// Interface 0
#define HS_C1_I0_ALT_NUMBER 0X01
- #if (HS_C1_I0_ALT_NUMBER >= 1)
+ #if (HS_C1_I0_ALT_NUMBER >= 1)
// AlternateSetting 0X00
#define HS_C1_I0_A0_bInterfaceNumber 0X00
#define HS_C1_I0_A0_bAlternateSetting 0X00
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
#define USB_ENABLE_UP_DMA() USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
(USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|BIT0)) // upstream DMA enable
-
+
#define USB_DISABLE_UP_DMA() USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
(USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)&(~BIT0))) // upstream DMA disable
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
#define USB_ENABLE_HP_DN_DMA() USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
- (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|BIT8)) // hp downstream DMA enable
+ (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|BIT8)) // hp downstream DMA enable
#define USB_DISABLE_HP_DN_DMA() USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
- (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)&(~BIT8))) // hp downstream DMA disable
+ (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)&(~BIT8))) // hp downstream DMA disable
#define USB_HP_DN_PACKET_MODE() USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
(USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)&(~BIT7))) // hpQ packet mode
(USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|BIT7)) // hpQ stream mode
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-#define USB_ENABLE_MP_DN_DMA() USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|BIT9)) // mp downstream DMA enable
+#define USB_ENABLE_MP_DN_DMA() USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|BIT9)) // mp downstream DMA enable
-#define USB_DISABLE_MP_DN_DMA() USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)&(~BIT9))) // mp downstream DMA disable
+#define USB_DISABLE_MP_DN_DMA() USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)&(~BIT9))) // mp downstream DMA disable
#define USB_MP_DN_PACKET_MODE() USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)&(~BIT10))) // hpQ packet mode
USB_ENABLE_HP_DN_DMA();
#define USB_STREAM_HOST_BUF_SIZE(size) USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
- (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|(size)));
+ (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|(size)));
#define USB_STREAM_TIMEOUT(time_cnt) USB_WORD_REG_WRITE(ZM_SOC_USB_TIME_CTRL_OFFSET, time_cnt); // set stream mode timeout critirea
#define USB_STREAM_AGG_PKT_CNT(cnt) USB_WORD_REG_WRITE(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, cnt); // set stream mode packet buffer critirea