* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+
+#include <rom.h>
+
#include "sys_cfg.h"
#include "athos_api.h"
+#include "adf_os_io.h"
+
#if defined(PROJECT_K2)
#if SYSTEM_MODULE_SFLASH
#include "sflash_api.h"
addr &= 0xfffffffc;
//val = *(unsigned long *)addr;
- val = HAL_WORD_REG_READ(addr);
+ val = ioread32(addr);
}
else if (strcmp(cmd, "LDRH") == 0)
{
addr &= 0xfffffffe;
- val = HAL_HALF_WORD_REG_READ(addr);
+ val = ioread16(addr);
}
else if (strcmp(cmd, "LDRB") == 0)
{
if (strcmp(cmd, "STR") == 0)
{
addr &= 0xfffffffc;
- //HAL_WORD_REG_WRITE(addr, val);
- HAL_WORD_REG_WRITE(addr, val);
- //*(volatile unsigned long *)(addr & 0xfffffffc) = (unsigned long)val;
+ iowrite32(addr, val);
}
else if (strcmp(cmd, "STRH") == 0)
{
addr &= 0xfffffffe;
//*(volatile unsigned short *)(addr & 0xfffffffe) = (unsigned short)val;
- HAL_HALF_WORD_REG_WRITE(addr, val);
+ iowrite16(addr, val);
}
else if (strcmp(cmd, "STRB") == 0)
{
if( addr & 0x00f00000 )
- HAL_BYTE_REG_WRITE(addr, val);
+ iowrite8(addr, val);
else
- HAL_BYTE_REG_WRITE(addr^3, val);
+ iowrite8(addr^3, val);
//*(volatile unsigned char *)addr = (unsigned char)val;
}
pending_intrs = A_INTR_GET_INTRENABLE()&(~CMNOS_IMASK_XTTIMER);
A_INTR_SET_INTRENABLE(pending_intrs);
A_PRINTF("- intr [0x%08x]\n\r", pending_intrs);
-
+
}
else if( db_ascii_to_hex(param2, &data)==0 )
{
delay = data;
else
delay = 3;
-
+
A_PRINTF("==>set cb to %d seconds \n\r", delay);
}
clk_sel = 4;
break;
case 40:
- clk_sel = 6;
+ clk_sel = 6;
break;
default:
clk_sel = 6;
break;
}
- HAL_WORD_REG_WRITE(0x50040, (0x300|clk_sel|(ratio>>1)<<12));
+ iowrite32(0x50040, (0x300|clk_sel|(ratio>>1)<<12));
A_UART_HWINIT((clk*1000*1000)/ratio, baud);
}
uint32_t ratio = 1;
uint32_t baud = 19200;
uint32_t clk = 0;
-
+
if( db_ascii_to_int(param1, &clk) != -1 )
{
A_PRINTF("changing clock to %d\n", clk);
return 1;
#else
-
+
{
uint32_t ccount1;
uint32_t ccount2;
else if( strcmp(param1, "event") == 0 )
{
uint32_t event= 0x00123400;
-#define USB_BYTE_REG_WRITE(addr, val) HAL_BYTE_REG_WRITE(USB_CTRL_BASE_ADDRESS|(uint8_t)(addr^3), (val))
-#define USB_BYTE_REG_READ(addr) HAL_BYTE_REG_READ(USB_CTRL_BASE_ADDRESS|(uint8_t)(addr^3))
-
-#define USB_WORD_REG_WRITE(addr, val) HAL_WORD_REG_WRITE(USB_CTRL_BASE_ADDRESS|(uint32_t)(addr), (val))
-#define USB_WORD_REG_READ(addr) HAL_WORD_REG_READ(USB_CTRL_BASE_ADDRESS|(uint32_t)(addr))
- // disable ep3 intr
- USB_BYTE_REG_WRITE(0x17, USB_BYTE_REG_READ(0x17)|0xc0);
+ /* disable ep3 intr */
+ iowrite8_usb(0x17, ioread8_usb(0x17)|0xc0);
- //ZM_CBUS_FIFO_SIZE_REG = 0xf;
- USB_WORD_REG_WRITE(0x100, 0x0f);
+ /* ZM_CBUS_FIFO_SIZE_REG = 0xf */
+ iowrite32_usb(0x100, 0x0f);
- //ZM_EP3_DATA_REG = event;
- USB_WORD_REG_WRITE(0xF8, event);
+ /* ZM_EP3_DATA_REG = event; */
+ iowrite32_usb(0xF8, event);
- // tx done
- USB_BYTE_REG_WRITE(0xAE, USB_BYTE_REG_READ(0xAE)|0x08);
+ /* tx done */
+ iowrite8_usb(0xAE, ioread8_usb(0xAE) | 0x08);
- // enable ep3 intr
- USB_BYTE_REG_WRITE(0x17, USB_BYTE_REG_READ(0x17)&0xbf);
+ /* enable ep3 intr */
+ iowrite8_usb(0x17, ioread8_usb(0x17) & 0xbf);
}
}