+/*
+ * Copyright (c) 2013 Qualcomm Atheros, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted (subject to the limitations in the
+ * disclaimer below) provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * * Neither the name of Qualcomm Atheros nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
+ * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
+ * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
#include "sys_cfg.h"
#if SYSTEM_MODULE_CLOCK
A_UINT32 pll_settling_time; /* 50us */
} cmnos_clocking_table[] = {
{A_REFCLK_10_MHZ,
- //10485760,
+ //10485760,
10000000,
- 0x0,
+ 0x0,
0x0,
0x0},
- {A_REFCLK_20_MHZ,
- //20971520,
+ {A_REFCLK_20_MHZ,
+ //20971520,
20000000,
- 0x0,
+ 0x0,
0x0,
0x0},
{A_REFCLK_40_MHZ,
- //41943040,
- 40000000,
+ //41943040,
+ 40000000,
0x0,
0x0,
0x0},
- {A_REFCLK_UNKNOWN,
- 0,
- 0x0,
+ {A_REFCLK_UNKNOWN,
+ 0,
+ 0x0,
0x0,
0x0},
};
A_UINT32 ref_clk = (clock_info->ticks_per_sec) >> 20;
A_UINT32 start_time = NOW();
unsigned int num_ticks = us*ref_clk; // system_freq == number of ticks per 1us
-
+
while ( (NOW() - start_time) < num_ticks) {
/* busy spin */;
}
clock_info = (struct cmnos_clock_s *)&cmnos_clocking_table[i];
// HOST_INTEREST->hi_clock_info = (A_UINT32)clock_info;
-
+
#endif
}
cmnos_tick(void)
{
#if 0
-
+
set_ccompare0(xthal_get_ccompare(XTENSA_TIMER_0)+ONE_MSEC);
cticks++;