AR9170_PWR_RESET_WLAN_MASK);
set(AR9170_PWR_REG_RESET, 0x0);
- clock_set(false, AHB_20_22MHZ);
+ set(AR9170_PWR_REG_CLOCK_SEL, AHB_40MHZ_OSC);
set(AR9170_PWR_REG_PLL_ADDAC, 0x5163); /* 0x502b; */
set(AR9170_PHY_REG_ADC_SERIAL_CTL, AR9170_PHY_ADC_SCTL_SEL_EXTERNAL_RADIO);