struct instruction *insn,
unsigned int opcode)
{
- int i;
+ unsigned int i;
struct operlist *ol;
int nr_oper = 0;
uint64_t code = 0;
return out;
}
+static void do_assemble_ret(struct assembler_context *ctx,
+ struct instruction *insn,
+ unsigned int opcode)
+{
+ struct code_output *out;
+
+ /* Get the previous instruction and check whether it
+ * is a jump instruction. */
+ list_for_each_entry_reverse(out, &ctx->output, list) {
+ /* Search the last insn. */
+ if (out->type == OUT_INSN) {
+ if (out->is_jump_insn) {
+ asm_warn(ctx, "RET instruction directly after "
+ "jump instruction. The hardware won't like this.");
+ }
+ break;
+ }
+ }
+ do_assemble_insn(ctx, insn, opcode);
+}
+
static unsigned int merge_ext_into_opcode(struct assembler_context *ctx,
unsigned int opbase,
struct instruction *insn)
out->is_jump_insn = 1;
break;
case OP_CALL:
+ if (ctx->arch != 5)
+ asm_error(ctx, "'call' instruction is only supported on arch 5");
do_assemble_insn(ctx, insn, 0x002);
break;
+ case OP_CALLS:
+ if (ctx->arch != 15)
+ asm_error(ctx, "'calls' instruction is only supported on arch 15");
+ do_assemble_insn(ctx, insn, 0x004);
+ break;
case OP_RET:
- /* Get the previous instruction and check whether it
- * is a jump instruction. */
- list_for_each_entry_reverse(out, &ctx->output, list) {
- /* Search the last insn. */
- if (out->type == OUT_INSN) {
- if (out->is_jump_insn) {
- asm_warn(ctx, "RET instruction directly after "
- "jump instruction. The hardware won't like this.");
- }
- break;
- }
- }
- do_assemble_insn(ctx, insn, 0x003);
+ if (ctx->arch != 5)
+ asm_error(ctx, "'ret' instruction is only supported on arch 5");
+ do_assemble_ret(ctx, insn, 0x003);
+ break;
+ case OP_RETS:
+ if (ctx->arch != 15)
+ asm_error(ctx, "'rets' instruction is only supported on arch 15");
+ do_assemble_insn(ctx, insn, 0x005);
break;
case OP_TKIPH:
case OP_TKIPHS:
{
struct code_output *c;
int addr;
- int i;
+ unsigned int i;
unsigned int current_address;
/* Calculate the absolute addresses for each instruction. */
exit(1);
}
if (IS_VERBOSE_DEBUG)
- fprintf(stderr, "\nCode:\n");
+ printf("\nCode:\n");
list_for_each_entry(c, &ctx->output, list) {
switch (c->type) {
}
}
- switch (output_format) {
+ switch (cmdargs.outformat) {
case FMT_RAW_LE32:
case FMT_RAW_BE32:
/* Nothing */
switch (c->type) {
case OUT_INSN:
if (IS_VERBOSE_DEBUG) {
- fprintf(stderr, "%03X %03X,%03X,%03X\n",
+ printf("%03X %04X,%04X,%04X\n",
c->opcode,
c->operands[0].u.operand,
c->operands[1].u.operand,
ctx->arch);
}
- switch (output_format) {
+ switch (cmdargs.outformat) {
case FMT_B43:
case FMT_RAW_BE32:
code = ((code & (uint64_t)0xFFFFFFFF00000000ULL) >> 32) |
}
}
- if (arg_print_sizes) {
+ if (cmdargs.print_sizes) {
printf("%s: text = %u instructions (%u bytes)\n",
fn, insn_count,
(unsigned int)(insn_count * sizeof(uint64_t)));