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Merge pull request #34 from olerem/rc
[open-ath9k-htc-firmware.git]
/
target_firmware
/
wlan
/
if_athvar.h
diff --git
a/target_firmware/wlan/if_athvar.h
b/target_firmware/wlan/if_athvar.h
index f5ac24fb28753ebe821c5f69ae26357ea2e187cf..c3a6fbe534924be24c8d3073e6522e16d4076751 100755
(executable)
--- a/
target_firmware/wlan/if_athvar.h
+++ b/
target_firmware/wlan/if_athvar.h
@@
-146,8
+146,10
@@
struct ath_txq;
#define ath_free_rx_skb(_sc,_skb) BUF_Pool_free_buf(_sc->pool_handle, POOL_ID_WLAN_RX_BUF, _skb)
#define ath_free_tx_skb(_htc_handle, endpt, _skb) HTC_ReturnBuffers(_htc_handle, endpt, _skb);
#define ath_free_rx_skb(_sc,_skb) BUF_Pool_free_buf(_sc->pool_handle, POOL_ID_WLAN_RX_BUF, _skb)
#define ath_free_tx_skb(_htc_handle, endpt, _skb) HTC_ReturnBuffers(_htc_handle, endpt, _skb);
-typedef void (*ath_txq_add_fn_t)(struct ath_softc_tgt *sc, struct ath_buf *bf);
-typedef void (*ath_tx_comp_fn_t)(struct ath_softc_tgt *sc, struct ath_buf *bf);
+struct ath_tx_buf;
+
+typedef void (*ath_txq_add_fn_t)(struct ath_softc_tgt *sc, struct ath_tx_buf *bf);
+typedef void (*ath_tx_comp_fn_t)(struct ath_softc_tgt *sc, struct ath_tx_buf *bf);
struct ath_buf_state {
ath_tx_comp_fn_t bfs_comp; /* completion function */
struct ath_buf_state {
ath_tx_comp_fn_t bfs_comp; /* completion function */
@@
-194,26
+196,30
@@
struct ath_buf_state {
#define bf_retries bf_state.bfs_retries
#define ATH_GENERIC_BUF \
#define bf_retries bf_state.bfs_retries
#define ATH_GENERIC_BUF \
- struct ath_buf *bf_next; \
- struct ath_desc *bf_desc; \
- struct ath_desc *bf_descarr; \
adf_os_dma_map_t bf_dmamap; \
adf_os_dmamap_info_t bf_dmamap_info; \
struct ieee80211_node_target *bf_node; \
adf_nbuf_queue_t bf_skbhead; \
adf_os_dma_map_t bf_dmamap; \
adf_os_dmamap_info_t bf_dmamap_info; \
struct ieee80211_node_target *bf_node; \
adf_nbuf_queue_t bf_skbhead; \
- adf_nbuf_t bf_skb; \
- struct ath_desc *bf_lastds;
+ adf_nbuf_t bf_skb;
struct ath_buf
{
ATH_GENERIC_BUF
asf_tailq_entry(ath_buf) bf_list;
struct ath_buf
{
ATH_GENERIC_BUF
asf_tailq_entry(ath_buf) bf_list;
+ struct ath_buf *bf_next;
+ struct ath_desc *bf_lastds;
+ struct ath_desc *bf_desc;
+ struct ath_desc *bf_descarr;
};
struct ath_tx_buf
{
ATH_GENERIC_BUF
asf_tailq_entry(ath_tx_buf) bf_list;
};
struct ath_tx_buf
{
ATH_GENERIC_BUF
asf_tailq_entry(ath_tx_buf) bf_list;
+ struct ath_tx_buf *bf_next;
+ struct ath_tx_desc *bf_desc;
+ struct ath_tx_desc *bf_descarr;
+ struct ath_tx_desc *bf_lastds;
struct ath_buf_state bf_state;
a_uint16_t bf_flags;
HTC_ENDPOINT_ID bf_endpt;
struct ath_buf_state bf_state;
a_uint16_t bf_flags;
HTC_ENDPOINT_ID bf_endpt;
@@
-225,11
+231,15
@@
struct ath_rx_buf
{
ATH_GENERIC_BUF
asf_tailq_entry(ath_rx_buf) bf_list;
{
ATH_GENERIC_BUF
asf_tailq_entry(ath_rx_buf) bf_list;
+ struct ath_rx_buf *bf_next;
+ struct ath_rx_desc *bf_desc;
+ struct ath_rx_desc *bf_descarr;
+ struct ath_rx_desc *bf_lastds;
a_uint32_t bf_status;
struct ath_rx_status bf_rx_status;
};
a_uint32_t bf_status;
struct ath_rx_status bf_rx_status;
};
-#define ATH_BUF_GET_DESC_PHY_ADDR(bf) bf->bf_desc
+#define ATH_BUF_GET_DESC_PHY_ADDR(bf)
(a_uint32_t)
bf->bf_desc
#define ATH_BUF_GET_DESC_PHY_ADDR_WITH_IDX(bf, idx) (adf_os_dma_addr_t)(&bf->bf_descarr[idx])
#define ATH_BUF_SET_DESC_PHY_ADDR(bf, addr)
#define ATH_BUF_SET_DESC_PHY_ADDR_WITH_IDX(bf, idx, addr)
#define ATH_BUF_GET_DESC_PHY_ADDR_WITH_IDX(bf, idx) (adf_os_dma_addr_t)(&bf->bf_descarr[idx])
#define ATH_BUF_SET_DESC_PHY_ADDR(bf, addr)
#define ATH_BUF_SET_DESC_PHY_ADDR_WITH_IDX(bf, idx, addr)
@@
-268,7
+278,7
@@
typedef struct ath_atx_tid {
a_int32_t baw_tail;
a_uint32_t tx_buf_bitmap[ATH_TID_MAX_BUFS/TX_BUF_BITMAP_SIZE];
asf_tailq_entry(ath_atx_tid) tid_qelem;
a_int32_t baw_tail;
a_uint32_t tx_buf_bitmap[ATH_TID_MAX_BUFS/TX_BUF_BITMAP_SIZE];
asf_tailq_entry(ath_atx_tid) tid_qelem;
- asf_tailq_head(ath_tid_rbq,ath_buf) buf_q;
+ asf_tailq_head(ath_tid_rbq,ath_
tx_
buf) buf_q;
a_int8_t paused;
a_int8_t sched;
a_uint8_t flag;
a_int8_t paused;
a_int8_t sched;
a_uint8_t flag;
@@
-295,9
+305,9
@@
struct ath_descdma {
struct ath_txq {
a_uint32_t axq_qnum;
a_uint32_t *axq_link;
struct ath_txq {
a_uint32_t axq_qnum;
a_uint32_t *axq_link;
- asf_tailq_head(,ath_buf) axq_q;
+ asf_tailq_head(,ath_
tx_
buf) axq_q;
a_uint32_t axq_depth;
a_uint32_t axq_depth;
- struct ath_buf *axq_linkbuf;
+ struct ath_
tx_
buf *axq_linkbuf;
asf_tailq_head(,ath_atx_tid) axq_tidq;
};
asf_tailq_head(,ath_atx_tid) axq_tidq;
};
@@
-311,7
+321,7
@@
struct wmi_rc_rate_mask_cmd {
struct ath_vap_target {
struct ieee80211vap_target av_vap;
struct ath_txq av_mcastq;
struct ath_vap_target {
struct ieee80211vap_target av_vap;
struct ath_txq av_mcastq;
- struct ath_
buf
*av_bcbuf;
+ struct ath_
tx_buf
*av_bcbuf;
a_uint32_t av_rate_mask[2]; /* 0 - 2G, 1 - 5G */
a_uint8_t av_minrateidx[2]; /* 0 - 2G, 1 - 5G */
a_int8_t av_valid;
a_uint32_t av_rate_mask[2]; /* 0 - 2G, 1 - 5G */
a_uint8_t av_minrateidx[2]; /* 0 - 2G, 1 - 5G */
a_int8_t av_valid;
@@
-356,8
+366,6
@@
struct ath_softc_tgt
struct ath_ratectrl *sc_rc;
a_uint32_t sc_invalid : 1,
struct ath_ratectrl *sc_rc;
a_uint32_t sc_invalid : 1,
- sc_txstbcsupport : 1,
- sc_rxstbcsupport : 2,
sc_tx_draining : 1,
sc_enable_coex : 1;
sc_tx_draining : 1,
sc_enable_coex : 1;
@@
-389,7
+397,7
@@
struct ath_softc_tgt
ath_deschead sc_rxdesc;
struct ath_rx_desc *sc_rxdesc_held;
ath_deschead sc_rxdesc;
struct ath_rx_desc *sc_rxdesc_held;
- struct ath_buf *sc_txbuf_held;
+ struct ath_
tx_
buf *sc_txbuf_held;
struct ath_descdma sc_rxdma;
struct ath_descdma sc_txdma;
struct ath_descdma sc_rxdma;
struct ath_descdma sc_txdma;
@@
-410,7
+418,7
@@
struct ath_softc_tgt
struct ath_vap_target sc_vap[TARGET_VAP_MAX];
struct ieee80211com_target sc_ic;
struct ath_vap_target sc_vap[TARGET_VAP_MAX];
struct ieee80211com_target sc_ic;
- ath_bufhead sc_bbuf;
+ ath_
tx_
bufhead sc_bbuf;
a_uint64_t sc_swba_tsf;
WMI_TXSTATUS_EVENT tx_status[2];
a_uint64_t sc_swba_tsf;
WMI_TXSTATUS_EVENT tx_status[2];
@@
-537,10
+545,6
@@
a_uint8_t ath_get_minrateidx(struct ath_softc_tgt *sc, struct ath_vap_target *av
((*(_ah)->ah_stopPcuReceive)((_ah)))
#define ath_hal_htsupported(_ah) \
(ath_hal_getcapability(_ah, HAL_CAP_HT, 0, NULL) == HAL_OK)
((*(_ah)->ah_stopPcuReceive)((_ah)))
#define ath_hal_htsupported(_ah) \
(ath_hal_getcapability(_ah, HAL_CAP_HT, 0, NULL) == HAL_OK)
-#define ath_hal_rxstbcsupport(_ah, _rxstbc) \
- (ath_hal_getcapability(_ah, HAL_CAP_RX_STBC, 0, _rxstbc) == HAL_OK)
-#define ath_hal_txstbcsupport(_ah, _txstbc) \
- (ath_hal_getcapability(_ah, HAL_CAP_TX_STBC, 0, _txstbc) == HAL_OK)
#define ath_hal_getrtsaggrlimit(_ah, _pv) \
(ath_hal_getcapability(_ah, HAL_CAP_RTS_AGGR_LIMIT, 0, _pv) == HAL_OK)
#define ath_hal_puttxbuf(_ah, _q, _bufaddr) \
#define ath_hal_getrtsaggrlimit(_ah, _pv) \
(ath_hal_getcapability(_ah, HAL_CAP_RTS_AGGR_LIMIT, 0, _pv) == HAL_OK)
#define ath_hal_puttxbuf(_ah, _q, _bufaddr) \