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Merge branch 'master' into halfandquarter
[carl9170fw.git]
/
carlfw
/
src
/
rf.c
diff --git
a/carlfw/src/rf.c
b/carlfw/src/rf.c
index 8bf34ea5e0aac3be7c4c7355b42c3abd9eb8057e..152aac59f5be225600e6b5cd081c1fb9cb9e31e6 100644
(file)
--- a/
carlfw/src/rf.c
+++ b/
carlfw/src/rf.c
@@
-30,15
+30,6
@@
#include "shared/phy.h"
#ifdef CONFIG_CARL9170FW_RADIO_FUNCTIONS
#include "shared/phy.h"
#ifdef CONFIG_CARL9170FW_RADIO_FUNCTIONS
-static void set_channel_start(void)
-{
- /* Manipulate CCA threshold to stop transmission */
- set(AR9170_PHY_REG_CCA_THRESHOLD, 0x300);
- /* Enable Virtual CCA */
- orl(AR9170_MAC_REG_QOS_PRIORITY_VIRTUAL_CCA,
- AR9170_MAC_VIRTUAL_CCA_ALL);
-}
-
static void set_channel_end(void)
{
/* Manipulate CCA threshold to resume transmission */
static void set_channel_end(void)
{
/* Manipulate CCA threshold to resume transmission */
@@
-46,11
+37,23
@@
static void set_channel_end(void)
/* Disable Virtual CCA */
andl(AR9170_MAC_REG_QOS_PRIORITY_VIRTUAL_CCA,
~AR9170_MAC_VIRTUAL_CCA_ALL);
/* Disable Virtual CCA */
andl(AR9170_MAC_REG_QOS_PRIORITY_VIRTUAL_CCA,
~AR9170_MAC_VIRTUAL_CCA_ALL);
+
+ fw.phy.state = CARL9170_PHY_ON;
}
void rf_notify_set_channel(void)
{
}
void rf_notify_set_channel(void)
{
- set_channel_start();
+ /* Manipulate CCA threshold to stop transmission */
+ set(AR9170_PHY_REG_CCA_THRESHOLD, 0x300);
+ /* Enable Virtual CCA */
+ orl(AR9170_MAC_REG_QOS_PRIORITY_VIRTUAL_CCA,
+ AR9170_MAC_VIRTUAL_CCA_ALL);
+
+ /* reset CCA stats */
+ fw.tally.active = 0;
+ fw.tally.cca = 0;
+ fw.tally.tx_time = 0;
+ fw.phy.state = CARL9170_PHY_OFF;
}
/*
}
/*
@@
-194,18
+197,19
@@
static uint32_t rf_init(const uint32_t delta_slope_coeff_exp,
void rf_cmd(const struct carl9170_cmd *cmd, struct carl9170_rsp *resp)
{
void rf_cmd(const struct carl9170_cmd *cmd, struct carl9170_rsp *resp)
{
- uint32_t ret;
+ uint32_t ret
, div
;
- fw.phy.
ht_settings = cmd->rf_init.ht_
settings;
+ fw.phy.
settings = cmd->rf_init.
settings;
fw.phy.frequency = cmd->rf_init.freq;
fw.phy.frequency = cmd->rf_init.freq;
+ div = GET_VAL(CARL9170FW_PHY_RF_DIV, fw.phy.settings);
/*
* Is the clock controlled by the PHY?
*/
/*
* Is the clock controlled by the PHY?
*/
- if ((fw.phy.
ht_
settings & EIGHTY_FLAG) == EIGHTY_FLAG)
- clock_set(AHB_80_88MHZ, true);
+ if ((fw.phy.settings & EIGHTY_FLAG) == EIGHTY_FLAG)
+ clock_set(AHB_80_88MHZ, true
, div
);
else
else
- clock_set(AHB_40_44MHZ, true);
+ clock_set(AHB_40_44MHZ, true
, div
);
ret = rf_init(le32_to_cpu(cmd->rf_init.delta_slope_coeff_exp),
le32_to_cpu(cmd->rf_init.delta_slope_coeff_man),
ret = rf_init(le32_to_cpu(cmd->rf_init.delta_slope_coeff_exp),
le32_to_cpu(cmd->rf_init.delta_slope_coeff_man),
@@
-242,7
+246,7
@@
void rf_psm(void)
/* Synthesizer off + RX off */
bank3 = 0x00400018;
/* Synthesizer off + RX off */
bank3 = 0x00400018;
-
clock_set(AHB_20_22MHZ, false)
;
+
fw.phy.state = CARL9170_PHY_OFF
;
} else {
/* advance to the next PSM step */
fw.phy.psm.state--;
} else {
/* advance to the next PSM step */
fw.phy.psm.state--;
@@
-259,10
+263,7
@@
void rf_psm(void)
/* Synthesizer on + RX on */
bank3 = 0x01420098;
/* Synthesizer on + RX on */
bank3 = 0x01420098;
- if ((fw.phy.ht_settings & EIGHTY_FLAG) == EIGHTY_FLAG)
- clock_set(AHB_80_88MHZ, true);
- else
- clock_set(AHB_40_44MHZ, true);
+ fw.phy.state = CARL9170_PHY_ON;
} else {
return ;
}
} else {
return ;
}