2 * carl9170 firmware - used by the ar9170 wireless device
4 * initialization and main() loop
6 * Copyright (c) 2000-2005 ZyDAS Technology Corporation
7 * Copyright (c) 2007-2009 Atheros Communications, Inc.
8 * Copyright 2009 Johannes Berg <johannes@sipsolutions.net>
9 * Copyright 2009-2011 Christian Lamparter <chunkeey@googlemail.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
35 #define AR9170_WATCH_DOG_TIMER 0x100
37 static void timer_init(const unsigned int timer, const unsigned int interval)
39 /* Set timer to periodic mode */
40 orl(AR9170_TIMER_REG_CONTROL, BIT(timer));
42 /* Set time interval */
43 set(AR9170_TIMER_REG_TIMER0 + (timer << 2), interval - 1);
45 /* Clear timer interrupt flag */
46 orl(AR9170_TIMER_REG_INTERRUPT, BIT(timer));
49 void clock_set(enum cpu_clock_t clock_, bool on)
53 * This setting does more than just mess with the CPU Clock.
54 * So watch out, if you need _stable_ timer interrupts.
56 #ifdef CONFIG_CARL9170FW_RADIO_FUNCTIONS
57 if (fw.phy.frequency < 3000000)
58 set(AR9170_PWR_REG_PLL_ADDAC, 0x5163);
60 set(AR9170_PWR_REG_PLL_ADDAC, 0x5143);
62 set(AR9170_PWR_REG_PLL_ADDAC, 0x5163);
63 #endif /* CONFIG_CARL9170FW_RADIO_FUNCTIONS */
65 fw.ticks_per_usec = GET_VAL(AR9170_PWR_PLL_ADDAC_DIV,
66 get(AR9170_PWR_REG_PLL_ADDAC));
68 set(AR9170_PWR_REG_CLOCK_SEL, (uint32_t) ((on ? 0x70 : 0x600) | clock_));
72 fw.ticks_per_usec >>= 1;
75 fw.ticks_per_usec >>= 1;
81 static void init(void)
85 #ifdef CONFIG_CARL9170FW_DEBUG_UART
87 #endif /* CONFIG_CARL9170FW_DEBUG_UART */
89 /* 25/50/100ms timer (depends on cpu clock) */
95 /* initialize DMA memory */
96 memset(&dma_mem, 0, sizeof(dma_mem));
99 dma_init_descriptors();
101 /* clear all interrupt */
102 set(AR9170_MAC_REG_INT_CTRL, 0xffff);
104 orl(AR9170_MAC_REG_AFTER_PNP, 1);
106 /* Init watch dog control flag */
107 fw.watchdog_enable = 1;
109 set(AR9170_TIMER_REG_WATCH_DOG, AR9170_WATCH_DOG_TIMER);
111 #ifdef CONFIG_CARL9170FW_GPIO_INTERRUPT
112 fw.cached_gpio_state.gpio = get(AR9170_GPIO_REG_PORT_DATA) &
114 #endif /* CONFIG_CARL9170FW_GPIO_INTERRUPT */
116 /* this will get the downqueue moving. */
120 static void handle_fw(void)
122 if (fw.watchdog_enable == 1)
123 set(AR9170_TIMER_REG_WATCH_DOG, AR9170_WATCH_DOG_TIMER);
129 static void timer0_isr(void)
133 #ifdef CONFIG_CARL9170FW_GPIO_INTERRUPT
135 #endif /* CONFIG_CARL9170FW_GPIO_INTERRUPT */
137 #ifdef CONFIG_CARL9170FW_DEBUG_LED_HEARTBEAT
138 set(AR9170_GPIO_REG_PORT_DATA, get(AR9170_GPIO_REG_PORT_DATA) ^ 1);
139 #endif /* CONFIG_CARL9170FW_DEBUG_LED_HEARTBEAT */
142 static void handle_timer(void)
146 intr = get(AR9170_TIMER_REG_INTERRUPT);
148 /* ACK timer interrupt */
149 set(AR9170_TIMER_REG_INTERRUPT, intr);
151 #define HANDLER(intr, flag, func) \
153 if ((intr & flag) != 0) { \
159 HANDLER(intr, BIT(0), timer0_isr);
162 DBG("Unhandled Timer Event %x", (unsigned int) intr);
167 static void tally_update(void)
169 unsigned int boff, time, delta;
171 time = get_clock_counter();
172 if (fw.phy.state == CARL9170_PHY_ON) {
173 delta = (time - fw.tally_clock);
175 fw.tally.active += delta;
177 boff = get(AR9170_MAC_REG_BACKOFF_STATUS);
178 if (boff & AR9170_MAC_BACKOFF_TX_PE)
179 fw.tally.tx_time += delta;
180 if (boff & AR9170_MAC_BACKOFF_CCA)
181 fw.tally.cca += delta;
184 fw.tally_clock = time;
188 static void __noreturn main_loop(void)
195 * Due to frame order persevation, the wlan subroutines
196 * must be executed before handle_host_interface.
200 handle_host_interface();
211 * The bootcode will work with the device driver to load the firmware
212 * onto the device's Program SRAM. The Program SRAM has a size of 16 KB
213 * and also contains the stack, which grows down from 0x204000.
215 * The Program SRAM starts at address 0x200000 on the device.
216 * The firmware entry point (0x200004) is located in boot.S.
217 * we put _start() there with the linker script carl9170.lds.
220 void __section(boot) start(void)
222 clock_set(AHB_40MHZ_OSC, true);
224 /* watchdog magic pattern check */
225 if ((get(AR9170_PWR_REG_WATCH_DOG_MAGIC) & 0xffff0000) == 0x12340000) {
226 /* watch dog warm start */
227 incl(AR9170_PWR_REG_WATCH_DOG_MAGIC);
229 } else if ((get(AR9170_PWR_REG_WATCH_DOG_MAGIC) & 0xffff0000) == 0x98760000) {
233 /* write the magic pattern for watch dog */
234 andl(AR9170_PWR_REG_WATCH_DOG_MAGIC, 0xFFFF);
235 orl(AR9170_PWR_REG_WATCH_DOG_MAGIC, 0x12340000);
239 #ifdef CONFIG_CARL9170FW_DEBUG
242 BUG_ON(0x2b || !0x2b);
243 INFO("INFO MESSAGE");
245 /* a set of unique characters to detect transfer data corruptions */
246 DBG("AaBbCcDdEeFfGgHhIiJjKkLlMmNnOoPpQqRrSsTtUuVvWwXxYyZz"
247 " ~`!1@2#3$4%%5^6&7*8(9)0_-+={[}]|\\:;\"'<,>.?/");
248 #endif /* CONFIG_CARL9170FW_DEBUG */
251 * Tell the host, that the firmware has booted and is
252 * now ready to process requests.
254 send_cmd_to_host(0, CARL9170_RSP_BOOT, 0x00, NULL);