1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * James Courtier-Dutton <James@superbug.co.uk>
5 * Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
8 * Routines for control of EMU10K1 chips
11 #include <linux/sched.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/interrupt.h>
16 #include <linux/iommu.h>
17 #include <linux/pci.h>
18 #include <linux/slab.h>
19 #include <linux/vmalloc.h>
20 #include <linux/mutex.h>
23 #include <sound/core.h>
24 #include <sound/emu10k1.h>
25 #include <linux/firmware.h>
31 #define HANA_FILENAME "/*(DEBLOBBED)*/"
32 #define DOCK_FILENAME "/*(DEBLOBBED)*/"
33 #define EMU1010B_FILENAME "/*(DEBLOBBED)*/"
34 #define MICRO_DOCK_FILENAME "/*(DEBLOBBED)*/"
35 #define EMU0404_FILENAME "/*(DEBLOBBED)*/"
36 #define EMU1010_NOTEBOOK_FILENAME "/*(DEBLOBBED)*/"
41 /*************************************************************************
43 *************************************************************************/
45 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
47 snd_emu10k1_ptr_write_multiple(emu, ch,
49 VTFT, VTFT_FILTERTARGET_MASK,
50 CVCF, CVCF_CURRENTFILTER_MASK,
62 // The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero
67 IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK,
70 TREMFRQ, 24, /* 1 Hz */
71 FM2FRQ2, 24, /* 1 Hz */
79 /* Audigy extra stuffs */
81 snd_emu10k1_ptr_write_multiple(emu, ch,
93 static const unsigned int spi_dac_init[] = {
117 static const unsigned int i2c_adc_init[][2] = {
118 { 0x17, 0x00 }, /* Reset */
119 { 0x07, 0x00 }, /* Timeout */
120 { 0x0b, 0x22 }, /* Interface control */
121 { 0x0c, 0x22 }, /* Master mode control */
122 { 0x0d, 0x08 }, /* Powerdown control */
123 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
124 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
125 { 0x10, 0x7b }, /* ALC Control 1 */
126 { 0x11, 0x00 }, /* ALC Control 2 */
127 { 0x12, 0x32 }, /* ALC Control 3 */
128 { 0x13, 0x00 }, /* Noise gate control */
129 { 0x14, 0xa6 }, /* Limiter control */
130 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
133 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir)
135 unsigned int silent_page;
139 /* disable audio and lock cache */
140 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
141 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
143 outl(0, emu->port + INTE);
145 snd_emu10k1_ptr_write_multiple(emu, 0,
146 /* reset recording buffers */
147 MICBS, ADCBS_BUFSIZE_NONE,
149 FXBS, ADCBS_BUFSIZE_NONE,
151 ADCBS, ADCBS_BUFSIZE_NONE,
154 /* disable channel interrupt */
158 /* disable stop on loop end */
165 /* set SPDIF bypass mode */
166 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
167 /* enable rear left + rear right AC97 slots */
168 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
172 /* init envelope engine */
173 for (ch = 0; ch < NUM_G; ch++)
174 snd_emu10k1_voice_init(emu, ch);
176 snd_emu10k1_ptr_write_multiple(emu, 0,
177 SPCS0, emu->spdif_bits[0],
178 SPCS1, emu->spdif_bits[1],
179 SPCS2, emu->spdif_bits[2],
182 if (emu->card_capabilities->emu_model) {
183 } else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
184 /* Hacks for Alice3 to work independent of haP16V driver */
185 /* Setup SRCMulti_I2S SamplingRate */
186 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
188 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
189 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
190 /* Setup SRCMulti Input Audio Enable */
191 /* Use 0xFFFFFFFF to enable P16V sounds. */
192 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
194 /* Enabled Phased (8-channel) P16V playback */
195 outl(0x0201, emu->port + HCFG2);
196 /* Set playback routing. */
197 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
198 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
199 /* Hacks for Alice3 to work independent of haP16V driver */
200 dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
201 /* Setup SRCMulti_I2S SamplingRate */
202 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
204 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
205 snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14);
207 /* Setup SRCMulti Input Audio Enable */
208 snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000);
210 /* Setup SPDIF Out Audio Enable */
211 /* The Audigy 2 Value has a separate SPDIF out,
212 * so no need for a mixer switch
214 snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000);
216 tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
217 outw(tmp, emu->port + A_IOCFG);
219 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
222 size = ARRAY_SIZE(spi_dac_init);
223 for (n = 0; n < size; n++)
224 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
226 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
229 * GPIO1: Speakers-enabled.
232 * GPIO4: IEC958 Output on.
237 outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
239 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
242 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
243 tmp = inw(emu->port + A_IOCFG);
244 outw(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
245 tmp = inw(emu->port + A_IOCFG);
246 size = ARRAY_SIZE(i2c_adc_init);
247 for (n = 0; n < size; n++)
248 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
249 for (n = 0; n < 4; n++) {
250 emu->i2c_capture_volume[n][0] = 0xcf;
251 emu->i2c_capture_volume[n][1] = 0xcf;
256 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
257 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
258 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */
260 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
261 for (ch = 0; ch < NUM_G; ch++) {
262 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
263 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
266 if (emu->card_capabilities->emu_model) {
267 outl(HCFG_AUTOMUTE_ASYNC |
269 HCFG_AUDIOENABLE, emu->port + HCFG);
272 * Mute Disable Audio = 0
273 * Lock Tank Memory = 1
274 * Lock Sound Memory = 0
277 } else if (emu->audigy) {
278 if (emu->revision == 4) /* audigy2 */
279 outl(HCFG_AUDIOENABLE |
280 HCFG_AC3ENABLE_CDSPDIF |
281 HCFG_AC3ENABLE_GPSPDIF |
282 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
284 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
285 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
286 * e.g. card_capabilities->joystick */
287 } else if (emu->model == 0x20 ||
288 emu->model == 0xc400 ||
289 (emu->model == 0x21 && emu->revision < 6))
290 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
292 /* With on-chip joystick */
293 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
295 if (enable_ir) { /* enable IR for SB Live */
296 if (emu->card_capabilities->emu_model) {
297 ; /* Disable all access to A_IOCFG for the emu1010 */
298 } else if (emu->card_capabilities->i2c_adc) {
299 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
300 } else if (emu->audigy) {
301 u16 reg = inw(emu->port + A_IOCFG);
302 outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
304 outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
306 outw(reg, emu->port + A_IOCFG);
308 unsigned int reg = inl(emu->port + HCFG);
309 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
311 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
313 outl(reg, emu->port + HCFG);
317 if (emu->card_capabilities->emu_model) {
318 ; /* Disable all access to A_IOCFG for the emu1010 */
319 } else if (emu->card_capabilities->i2c_adc) {
320 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
321 } else if (emu->audigy) { /* enable analog output */
322 u16 reg = inw(emu->port + A_IOCFG);
323 outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
326 if (emu->address_mode == 0) {
328 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
334 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
337 * Enable the audio bit
339 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
341 /* Enable analog/digital outs on audigy */
342 if (emu->card_capabilities->emu_model) {
343 ; /* Disable all access to A_IOCFG for the emu1010 */
344 } else if (emu->card_capabilities->i2c_adc) {
345 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
346 } else if (emu->audigy) {
347 outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
349 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
350 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
351 * This has to be done after init ALice3 I2SOut beyond 48KHz.
352 * So, sequence is important. */
353 outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
354 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
355 /* Unmute Analog now. */
356 outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
358 /* Disable routing from AC97 line out to Front speakers */
359 outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
366 /* FIXME: the following routine disables LiveDrive-II !! */
367 /* TOSLink detection */
369 tmp = inl(emu->port + HCFG);
370 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
371 outl(tmp|0x800, emu->port + HCFG);
373 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
375 outl(tmp, emu->port + HCFG);
381 if (emu->card_capabilities->emu_model)
382 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE | INTE_A_GPIOENABLE);
384 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
387 int snd_emu10k1_done(struct snd_emu10k1 *emu)
391 outl(0, emu->port + INTE);
394 * Shutdown the voices
396 for (ch = 0; ch < NUM_G; ch++) {
397 snd_emu10k1_ptr_write_multiple(emu, ch,
408 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
410 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
412 snd_emu10k1_ptr_write_multiple(emu, 0,
413 /* reset recording buffers */
419 ADCBS, ADCBS_BUFSIZE_NONE,
421 TCBS, TCBS_BUFFSIZE_16K,
424 /* disable channel interrupt */
434 /* disable audio and lock cache */
435 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
440 /*************************************************************************
441 * ECARD functional implementation
442 *************************************************************************/
444 /* In A1 Silicon, these bits are in the HC register */
445 #define HOOKN_BIT (1L << 12)
446 #define HANDN_BIT (1L << 11)
447 #define PULSEN_BIT (1L << 10)
449 #define EC_GDI1 (1 << 13)
450 #define EC_GDI0 (1 << 14)
452 #define EC_NUM_CONTROL_BITS 20
454 #define EC_AC3_DATA_SELN 0x0001L
455 #define EC_EE_DATA_SEL 0x0002L
456 #define EC_EE_CNTRL_SELN 0x0004L
457 #define EC_EECLK 0x0008L
458 #define EC_EECS 0x0010L
459 #define EC_EESDO 0x0020L
460 #define EC_TRIM_CSN 0x0040L
461 #define EC_TRIM_SCLK 0x0080L
462 #define EC_TRIM_SDATA 0x0100L
463 #define EC_TRIM_MUTEN 0x0200L
464 #define EC_ADCCAL 0x0400L
465 #define EC_ADCRSTN 0x0800L
466 #define EC_DACCAL 0x1000L
467 #define EC_DACMUTEN 0x2000L
468 #define EC_LEDN 0x4000L
470 #define EC_SPDIF0_SEL_SHIFT 15
471 #define EC_SPDIF1_SEL_SHIFT 17
472 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
473 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
474 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
475 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
476 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
477 * be incremented any time the EEPROM's
478 * format is changed. */
480 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
482 /* Addresses for special values stored in to EEPROM */
483 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
484 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
485 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
487 #define EC_LAST_PROMFILE_ADDR 0x2f
489 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
490 * can be up to 30 characters in length
491 * and is stored as a NULL-terminated
492 * ASCII string. Any unused bytes must be
493 * filled with zeros */
494 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
497 /* Most of this stuff is pretty self-evident. According to the hardware
498 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
499 * offset problem. Weird.
501 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
505 #define EC_DEFAULT_ADC_GAIN 0xC4C4
506 #define EC_DEFAULT_SPDIF0_SEL 0x0
507 #define EC_DEFAULT_SPDIF1_SEL 0x4
509 /**************************************************************************
510 * @func Clock bits into the Ecard's control latch. The Ecard uses a
511 * control latch will is loaded bit-serially by toggling the Modem control
512 * lines from function 2 on the E8010. This function hides these details
513 * and presents the illusion that we are actually writing to a distinct
517 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
519 unsigned short count;
521 unsigned long hc_port;
522 unsigned int hc_value;
524 hc_port = emu->port + HCFG;
525 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
526 outl(hc_value, hc_port);
528 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
530 /* Set up the value */
531 data = ((value & 0x1) ? PULSEN_BIT : 0);
534 outl(hc_value | data, hc_port);
536 /* Clock the shift register */
537 outl(hc_value | data | HANDN_BIT, hc_port);
538 outl(hc_value | data, hc_port);
542 outl(hc_value | HOOKN_BIT, hc_port);
543 outl(hc_value, hc_port);
546 /**************************************************************************
547 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
548 * trim value consists of a 16bit value which is composed of two
549 * 8 bit gain/trim values, one for the left channel and one for the
550 * right channel. The following table maps from the Gain/Attenuation
551 * value in decibels into the corresponding bit pattern for a single
555 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
560 /* Enable writing to the TRIM registers */
561 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
563 /* Do it again to insure that we meet hold time requirements */
564 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
566 for (bit = (1 << 15); bit; bit >>= 1) {
569 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
572 value |= EC_TRIM_SDATA;
575 snd_emu10k1_ecard_write(emu, value);
576 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
577 snd_emu10k1_ecard_write(emu, value);
580 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
583 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
585 unsigned int hc_value;
587 /* Set up the initial settings */
588 emu->ecard_ctrl = EC_RAW_RUN_MODE |
589 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
590 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
592 /* Step 0: Set the codec type in the hardware control register
593 * and enable audio output */
594 hc_value = inl(emu->port + HCFG);
595 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
596 inl(emu->port + HCFG);
598 /* Step 1: Turn off the led and deassert TRIM_CS */
599 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
601 /* Step 2: Calibrate the ADC and DAC */
602 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
604 /* Step 3: Wait for awhile; XXX We can't get away with this
605 * under a real operating system; we'll need to block and wait that
607 snd_emu10k1_wait(emu, 48000);
609 /* Step 4: Switch off the DAC and ADC calibration. Note
610 * That ADC_CAL is actually an inverted signal, so we assert
611 * it here to stop calibration. */
612 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
614 /* Step 4: Switch into run mode */
615 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
617 /* Step 5: Set the analog input gain */
618 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
623 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
625 unsigned long special_port;
626 __always_unused unsigned int value;
628 /* Special initialisation routine
629 * before the rest of the IO-Ports become active.
631 special_port = emu->port + 0x38;
632 value = inl(special_port);
633 outl(0x00d00000, special_port);
634 value = inl(special_port);
635 outl(0x00d00001, special_port);
636 value = inl(special_port);
637 outl(0x00d0005f, special_port);
638 value = inl(special_port);
639 outl(0x00d0007f, special_port);
640 value = inl(special_port);
641 outl(0x0090007f, special_port);
642 value = inl(special_port);
644 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
645 /* Delay to give time for ADC chip to switch on. It needs 113ms */
650 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu,
651 const struct firmware *fw_entry)
656 __always_unused u16 write_post;
661 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
662 /* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */
663 /* GPIO7 -> FPGA PGMN
666 * FPGA CONFIG OFF -> FPGA PGMN
668 spin_lock_irq(&emu->emu_lock);
669 outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */
670 write_post = inw(emu->port + A_GPIO);
672 outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */
673 write_post = inw(emu->port + A_GPIO);
674 udelay(100); /* Allow FPGA memory to clean */
675 for (n = 0; n < fw_entry->size; n++) {
676 value = fw_entry->data[n];
677 for (i = 0; i < 8; i++) {
682 outw(reg, emu->port + A_GPIO);
683 write_post = inw(emu->port + A_GPIO);
684 outw(reg | 0x40, emu->port + A_GPIO);
685 write_post = inw(emu->port + A_GPIO);
688 /* After programming, set GPIO bit 4 high again. */
689 outw(0x10, emu->port + A_GPIO);
690 write_post = inw(emu->port + A_GPIO);
691 spin_unlock_irq(&emu->emu_lock);
696 /* firmware file names, per model, init-fw and dock-fw (optional) */
697 static const char * const firmware_names[5][2] = {
698 [EMU_MODEL_EMU1010] = {
699 HANA_FILENAME, DOCK_FILENAME
701 [EMU_MODEL_EMU1010B] = {
702 EMU1010B_FILENAME, MICRO_DOCK_FILENAME
704 [EMU_MODEL_EMU1616] = {
705 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME
707 [EMU_MODEL_EMU0404] = {
708 EMU0404_FILENAME, NULL
712 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock,
713 const struct firmware **fw)
715 const char *filename;
719 filename = firmware_names[emu->card_capabilities->emu_model][dock];
722 err = reject_firmware(fw, filename, &emu->pci->dev);
727 return snd_emu1010_load_firmware_entry(emu, *fw);
730 static void emu1010_firmware_work(struct work_struct *work)
732 struct snd_emu10k1 *emu;
736 emu = container_of(work, struct snd_emu10k1,
737 emu1010.firmware_work);
738 if (emu->card->shutdown)
740 #ifdef CONFIG_PM_SLEEP
744 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */
745 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
746 /* Audio Dock attached */
747 /* Return to Audio Dock programming mode */
748 dev_info(emu->card->dev,
749 "emu1010: Loading Audio Dock Firmware\n");
750 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG,
751 EMU_HANA_FPGA_CONFIG_AUDIODOCK);
752 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw);
755 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
756 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp);
757 dev_info(emu->card->dev,
758 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp);
759 if ((tmp & 0x1f) != 0x15) {
760 /* FPGA failed to be programmed */
761 dev_info(emu->card->dev,
762 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
766 dev_info(emu->card->dev,
767 "emu1010: Audio Dock Firmware loaded\n");
768 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
769 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
770 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2);
771 /* Sync clocking between 1010 and Dock */
772 /* Allow DLL to settle */
774 /* Unmute all. Default is muted after a firmware load */
775 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
779 static void emu1010_clock_work(struct work_struct *work)
781 struct snd_emu10k1 *emu;
782 struct snd_ctl_elem_id id;
784 emu = container_of(work, struct snd_emu10k1,
786 if (emu->card->shutdown)
788 #ifdef CONFIG_PM_SLEEP
793 spin_lock_irq(&emu->reg_lock);
794 // This is the only thing that can actually happen.
795 emu->emu1010.clock_source = emu->emu1010.clock_fallback;
796 emu->emu1010.wclock = 1 - emu->emu1010.clock_source;
797 snd_emu1010_update_clock(emu);
798 spin_unlock_irq(&emu->reg_lock);
799 snd_ctl_build_ioff(&id, emu->ctl_clock_source, 0);
800 snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE, &id);
803 static void emu1010_interrupt(struct snd_emu10k1 *emu)
807 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &sts);
808 if (sts & EMU_HANA_IRQ_DOCK_LOST) {
809 /* Audio Dock removed */
810 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
811 /* The hardware auto-mutes all, so we unmute again */
812 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
813 } else if (sts & EMU_HANA_IRQ_DOCK) {
814 schedule_work(&emu->emu1010.firmware_work);
816 if (sts & EMU_HANA_IRQ_WCLK_CHANGED)
817 schedule_work(&emu->emu1010.clock_work);
821 * Current status of the driver:
822 * ----------------------------
823 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
824 * * PCM device nb. 2:
825 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
826 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
828 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
833 dev_info(emu->card->dev, "emu1010: Special config.\n");
835 /* Mute, and disable audio and lock cache, just in case.
836 * Proper init follows in snd_emu10k1_init(). */
837 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
839 /* Disable 48Volt power to Audio Dock */
840 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
842 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
843 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
844 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
845 if ((reg & 0x3f) == 0x15) {
846 /* FPGA netlist already present so clear it */
847 /* Return to programming mode */
849 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA);
851 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
852 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
853 if ((reg & 0x3f) == 0x15) {
854 /* FPGA failed to return to programming mode */
855 dev_info(emu->card->dev,
856 "emu1010: FPGA failed to return to programming mode\n");
859 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
861 err = snd_emu1010_load_firmware(emu, 0, &emu->firmware);
863 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
867 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
868 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
869 if ((reg & 0x3f) != 0x15) {
870 /* FPGA failed to be programmed */
871 dev_info(emu->card->dev,
872 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
877 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
878 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
879 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
880 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
881 /* Enable 48Volt power to Audio Dock */
882 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
884 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
885 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
886 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE)
887 schedule_work(&emu->emu1010.firmware_work);
888 if (emu->card_capabilities->no_adat) {
889 emu->emu1010.optical_in = 0; /* IN_SPDIF */
890 emu->emu1010.optical_out = 0; /* OUT_SPDIF */
892 /* Optical -> ADAT I/O */
893 emu->emu1010.optical_in = 1; /* IN_ADAT */
894 emu->emu1010.optical_out = 1; /* OUT_ADAT */
896 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
897 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
898 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
899 /* Set no attenuation on Audio Dock pads. */
900 emu->emu1010.adc_pads = 0x00;
901 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads);
902 /* Unmute Audio dock DACs, Headphone source DAC-4. */
903 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4);
905 emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 |
906 EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4;
907 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads);
908 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
909 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID);
911 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2);
912 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2);
914 emu->gpio_interrupt = emu1010_interrupt;
915 // Note: The Audigy INTE is set later
916 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE,
917 EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST | EMU_HANA_IRQ_WCLK_CHANGED);
918 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®); // Clear pending IRQs
920 emu->emu1010.clock_source = 1; /* 48000 */
921 emu->emu1010.clock_fallback = 1; /* 48000 */
922 /* Default WCLK set to 48kHz. */
923 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K);
924 /* Word Clock source, Internal 48kHz x1 */
925 emu->emu1010.wclock = EMU_HANA_WCLOCK_INT_48K;
926 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
927 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
928 snd_emu1010_update_clock(emu);
930 // The routes are all set to EMU_SRC_SILENCE due to the reset,
931 // so it is safe to simply enable the outputs.
932 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
937 * Create the EMU10K1 instance
940 #ifdef CONFIG_PM_SLEEP
941 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
942 static void free_pm_buffer(struct snd_emu10k1 *emu);
945 static void snd_emu10k1_free(struct snd_card *card)
947 struct snd_emu10k1 *emu = card->private_data;
949 if (emu->port) { /* avoid access to already used hardware */
950 snd_emu10k1_fx8010_tram_setup(emu, 0);
951 snd_emu10k1_done(emu);
952 snd_emu10k1_free_efx(emu);
954 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
955 /* Disable 48Volt power to Audio Dock */
956 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
958 cancel_work_sync(&emu->emu1010.firmware_work);
959 cancel_work_sync(&emu->emu1010.clock_work);
960 release_firmware(emu->firmware);
961 release_firmware(emu->dock_fw);
962 snd_util_memhdr_free(emu->memhdr);
963 if (emu->silent_page.area)
964 snd_dma_free_pages(&emu->silent_page);
965 if (emu->ptb_pages.area)
966 snd_dma_free_pages(&emu->ptb_pages);
967 vfree(emu->page_ptr_table);
968 vfree(emu->page_addr_table);
969 #ifdef CONFIG_PM_SLEEP
974 static const struct snd_emu_chip_details emu_chip_details[] = {
975 /* Audigy 5/Rx SB1550 */
976 /* Tested by michael@gernoth.net 28 Mar 2015 */
977 /* DSP: CA10300-IAT LF
978 * DAC: Cirrus Logic CS4382-KQZ
980 * AC97: Sigmatel STAC9750
983 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
984 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
989 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
991 /* Audigy4 (Not PRO) SB0610 */
992 /* Tested by James@superbug.co.uk 4th April 2006 */
998 * 3: 0 - Digital Out, 1 - Line in
1006 * A: Green jack sense (Front)
1008 * C: Black jack sense (Rear/Side Right)
1009 * D: Yellow jack sense (Center/LFE/Side Left)
1013 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1017 /* Mic input not tested.
1018 * Analog CD input not tested
1019 * Digital Out not tested.
1021 * Audio output 5.1 working. Side outputs not working.
1023 /* DSP: CA10300-IAT LF
1024 * DAC: Cirrus Logic CS4382-KQZ
1025 * ADC: Philips 1361T
1026 * AC97: Sigmatel STAC9750
1029 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1030 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1035 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1037 /* Audigy 2 Value AC3 out does not work yet.
1038 * Need to find out how to turn off interpolators.
1040 /* Tested by James@superbug.co.uk 3rd July 2005 */
1043 * ADC: Philips 1361T
1048 * A_IOCFG Input (GPIO)
1049 * 0x400 = Front analog jack plugged in. (Green socket)
1050 * 0x1000 = Rear analog jack plugged in. (Black socket)
1051 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket)
1052 * A_IOCFG Output (GPIO)
1053 * 0x60 = Sound out of front Left.
1054 * Win sets it to 0xXX61
1056 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1057 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1063 /* Audigy 2 ZS Notebook Cardbus card.*/
1064 /* Tested by James@superbug.co.uk 6th November 2006 */
1065 /* Audio output 7.1/Headphones working.
1066 * Digital output working. (AC3 not checked, only PCM)
1067 * Audio Mic/Line inputs working.
1068 * Digital input not tested.
1071 * DAC: Wolfson WM8768/WM8568
1072 * ADC: Wolfson WM8775
1076 /* Tested by James@superbug.co.uk 4th April 2006 */
1080 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1081 * 2: Analog input 0 = line in, 1 = mic in
1083 * 4: Digital output 0 = off, 1 = on.
1088 * All bits 1 (0x3fxx) means nothing plugged in.
1089 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1090 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1091 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1095 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1096 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1100 .ca_cardbus_chip = 1,
1104 /* This is MAEM8950 "Mana" */
1105 /* Attach MicroDock[M] to make it an E-MU 1616[m]. */
1106 /* Does NOT support sync daughter card (obviously). */
1107 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1108 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1109 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]",
1113 .ca_cardbus_chip = 1,
1115 .emu_model = EMU_MODEL_EMU1616},
1116 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1117 /* This is MAEM8960 "Hana3", 0202 is MAEM8980 */
1118 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1119 * MicroDock[M] to make it an E-MU 1616[m]. */
1120 /* Does NOT support sync daughter card. */
1121 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1122 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]",
1127 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1128 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1129 /* This is MAEM8986, 0202 is MAEM8980 */
1130 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1131 * MicroDockM to make it an E-MU 1616m. The non-m
1132 * version was never sold with this card, but should
1134 /* Does NOT support sync daughter card. */
1135 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1136 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]",
1141 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1142 /* Tested by James@superbug.co.uk 8th July 2005. */
1143 /* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */
1144 /* Attach 0202 daughter card to make it an E-MU 1212m, OR an
1145 * AudioDock[M] to make it an E-MU 1820[m]. */
1146 /* Supports sync daughter card. */
1147 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1148 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]",
1153 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1154 /* This is MAEM8852 "HanaLiteLite" */
1155 /* Supports sync daughter card. */
1156 /* Tested by oswald.buddenhagen@gmx.de Mar 2023. */
1157 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1158 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]",
1164 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1165 /* This is MAEM8850 "HanaLite" */
1166 /* Supports sync daughter card. */
1167 /* Tested by James@superbug.co.uk 20-3-2007. */
1168 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1169 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]",
1175 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1177 /* Does NOT support sync daughter card. */
1178 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1179 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]",
1185 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1186 {.vendor = 0x1102, .device = 0x0008,
1187 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1192 /* Tested by James@superbug.co.uk 3rd July 2005 */
1193 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1194 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1202 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1203 /* The 0x20061102 does have SB0350 written on it
1204 * Just like 0x20021102
1206 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1207 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1214 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1216 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1217 Creative's Windows driver */
1218 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1219 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1226 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1228 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1229 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1236 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1238 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1239 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1246 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1249 /* Tested by James@superbug.co.uk 3rd July 2005 */
1252 * ADC: Philips 1361T
1256 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1257 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1264 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1266 /* Audigy 2 Platinum EX */
1267 /* Win driver sets A_IOCFG output to 0x1c00 */
1268 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1269 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1276 /* Dell OEM/Creative Labs Audigy 2 ZS */
1277 /* See ALSA bug#1365 */
1278 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1279 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1286 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1288 /* Audigy 2 Platinum */
1289 /* Win driver sets A_IOCFG output to 0xa00 */
1290 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1291 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1298 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1299 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1301 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1302 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1309 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1310 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1315 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1316 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1322 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1323 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1328 {.vendor = 0x1102, .device = 0x0004,
1329 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1334 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1335 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1340 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1341 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1346 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1347 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1352 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1353 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1358 /* Tested by ALSA bug#1680 26th December 2005 */
1359 /* note: It really has SB0220 written on the card, */
1360 /* but it's SB0228 according to kx.inf */
1361 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1362 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1367 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1368 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1369 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1374 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1375 .driver = "EMU10K1", .name = "SB Live! 5.1",
1380 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1381 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1382 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1385 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1386 * share the same IDs!
1389 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1390 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1395 /* SB Live! Platinum */
1396 /* Win driver sets A_IOCFG output to 0 */
1397 /* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */
1398 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1399 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1403 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1404 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1409 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1410 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1415 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1416 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1421 /* Tested by James@superbug.co.uk 3rd July 2005 */
1422 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1423 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1428 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1429 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1434 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1435 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1440 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1441 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1446 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1447 .driver = "EMU10K1", .name = "E-MU APS [PC545]",
1451 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1452 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1457 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1458 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1463 {.vendor = 0x1102, .device = 0x0002,
1464 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1469 { } /* terminator */
1473 * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too)
1474 * has a problem that from time to time it likes to do few DMA reads a bit
1475 * beyond its normal allocation and gets very confused if these reads get
1476 * blocked by a IOMMU.
1478 * This behaviour has been observed for the first (reserved) page
1479 * (for which it happens multiple times at every playback), often for various
1480 * synth pages and sometimes for PCM playback buffers and the page table
1483 * As a workaround let's widen these DMA allocations by an extra page if we
1484 * detect that the device is behind a non-passthrough IOMMU.
1486 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu)
1488 struct iommu_domain *domain;
1490 emu->iommu_workaround = false;
1492 domain = iommu_get_domain_for_dev(emu->card->dev);
1493 if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY)
1496 dev_notice(emu->card->dev,
1497 "non-passthrough IOMMU detected, widening DMA allocations");
1498 emu->iommu_workaround = true;
1501 int snd_emu10k1_create(struct snd_card *card,
1502 struct pci_dev *pci,
1503 unsigned short extin_mask,
1504 unsigned short extout_mask,
1505 long max_cache_bytes,
1509 struct snd_emu10k1 *emu = card->private_data;
1512 size_t page_table_size;
1514 unsigned int silent_page;
1515 const struct snd_emu_chip_details *c;
1517 /* enable PCI device */
1518 err = pcim_enable_device(pci);
1522 card->private_free = snd_emu10k1_free;
1524 spin_lock_init(&emu->reg_lock);
1525 spin_lock_init(&emu->emu_lock);
1526 spin_lock_init(&emu->spi_lock);
1527 spin_lock_init(&emu->i2c_lock);
1528 spin_lock_init(&emu->voice_lock);
1529 spin_lock_init(&emu->synth_lock);
1530 spin_lock_init(&emu->memblk_lock);
1531 mutex_init(&emu->fx8010.lock);
1532 INIT_LIST_HEAD(&emu->mapped_link_head);
1533 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1537 emu->get_synth_voice = NULL;
1538 INIT_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work);
1539 INIT_WORK(&emu->emu1010.clock_work, emu1010_clock_work);
1540 /* read revision & serial */
1541 emu->revision = pci->revision;
1542 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1543 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1545 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1546 pci->vendor, pci->device, emu->serial, emu->model);
1548 for (c = emu_chip_details; c->vendor; c++) {
1549 if (c->vendor == pci->vendor && c->device == pci->device) {
1551 if (c->subsystem && (c->subsystem == subsystem))
1556 if (c->subsystem && (c->subsystem != emu->serial))
1558 if (c->revision && c->revision != emu->revision)
1564 if (c->vendor == 0) {
1565 dev_err(card->dev, "emu10k1: Card not recognised\n");
1568 emu->card_capabilities = c;
1569 if (c->subsystem && !subsystem)
1570 dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1572 dev_dbg(card->dev, "Sound card name = %s, "
1573 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1574 "Forced to subsystem = 0x%x\n", c->name,
1575 pci->vendor, pci->device, emu->serial, c->subsystem);
1577 dev_dbg(card->dev, "Sound card name = %s, "
1578 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1579 c->name, pci->vendor, pci->device,
1582 if (!*card->id && c->id)
1583 strscpy(card->id, c->id, sizeof(card->id));
1585 is_audigy = emu->audigy = c->emu10k2_chip;
1587 snd_emu10k1_detect_iommu(emu);
1589 /* set addressing mode */
1590 emu->address_mode = is_audigy ? 0 : 1;
1591 /* set the DMA transfer mask */
1592 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1593 if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) {
1595 "architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1600 emu->gpr_base = A_FXGPREGBASE;
1602 emu->gpr_base = FXGPREGBASE;
1604 err = pci_request_regions(pci, "EMU10K1");
1607 emu->port = pci_resource_start(pci, 0);
1609 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1611 page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 :
1613 if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size,
1614 &emu->ptb_pages) < 0)
1616 dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n",
1617 (unsigned long)emu->ptb_pages.addr,
1618 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes));
1620 emu->page_ptr_table = vmalloc(array_size(sizeof(void *),
1621 emu->max_cache_pages));
1622 emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long),
1623 emu->max_cache_pages));
1624 if (!emu->page_ptr_table || !emu->page_addr_table)
1627 if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE,
1628 &emu->silent_page) < 0)
1630 dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n",
1631 (unsigned long)emu->silent_page.addr,
1632 (unsigned long)(emu->silent_page.addr +
1633 emu->silent_page.bytes));
1635 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1638 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1639 sizeof(struct snd_util_memblk);
1641 pci_set_master(pci);
1643 // The masks are not used for Audigy.
1644 // FIXME: these should come from the card_capabilites table.
1645 if (extin_mask == 0)
1646 extin_mask = 0x3fcf; // EXTIN_*
1647 if (extout_mask == 0)
1648 extout_mask = 0x7fff; // EXTOUT_*
1649 emu->fx8010.extin_mask = extin_mask;
1650 emu->fx8010.extout_mask = extout_mask;
1651 emu->enable_ir = enable_ir;
1653 if (emu->card_capabilities->ca_cardbus_chip) {
1654 err = snd_emu10k1_cardbus_init(emu);
1658 if (emu->card_capabilities->ecard) {
1659 err = snd_emu10k1_ecard_init(emu);
1662 } else if (emu->card_capabilities->emu_model) {
1663 err = snd_emu10k1_emu1010_init(emu);
1667 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1668 does not support this, it shouldn't do any harm */
1669 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1670 AC97SLOT_CNTR|AC97SLOT_LFE);
1673 /* initialize TRAM setup */
1674 emu->fx8010.itram_size = (16 * 1024)/2;
1675 emu->fx8010.etram_pages.area = NULL;
1676 emu->fx8010.etram_pages.bytes = 0;
1678 /* irq handler must be registered after I/O ports are activated */
1679 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt,
1680 IRQF_SHARED, KBUILD_MODNAME, emu))
1682 emu->irq = pci->irq;
1683 card->sync_irq = emu->irq;
1686 * Init to 0x02109204 :
1687 * Clock accuracy = 0 (1000ppm)
1688 * Sample Rate = 2 (48kHz)
1689 * Audio Channel = 1 (Left of 2)
1690 * Source Number = 0 (Unspecified)
1691 * Generation Status = 1 (Original for Cat Code 12)
1692 * Cat Code = 12 (Digital Signal Mixer)
1694 * Emphasis = 0 (None)
1695 * CP = 1 (Copyright unasserted)
1696 * AN = 0 (Audio data)
1699 emu->spdif_bits[0] = emu->spdif_bits[1] =
1700 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1701 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1702 SPCS_GENERATIONSTATUS | 0x00001200 |
1703 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1705 /* Clear silent pages and set up pointers */
1706 memset(emu->silent_page.area, 0, emu->silent_page.bytes);
1707 silent_page = emu->silent_page.addr << emu->address_mode;
1708 pgtbl = (__le32 *)emu->ptb_pages.area;
1709 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
1710 pgtbl[idx] = cpu_to_le32(silent_page | idx);
1712 /* set up voice indices */
1713 for (idx = 0; idx < NUM_G; idx++)
1714 emu->voices[idx].number = idx;
1716 err = snd_emu10k1_init(emu, enable_ir);
1719 #ifdef CONFIG_PM_SLEEP
1720 err = alloc_pm_buffer(emu);
1725 /* Initialize the effect engine */
1726 err = snd_emu10k1_init_efx(emu);
1729 snd_emu10k1_audio_enable(emu);
1731 #ifdef CONFIG_SND_PROC_FS
1732 snd_emu10k1_proc_init(emu);
1737 #ifdef CONFIG_PM_SLEEP
1738 static const unsigned char saved_regs[] = {
1739 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1740 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1741 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1742 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1743 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1744 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1747 static const unsigned char saved_regs_audigy[] = {
1748 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC,
1749 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1753 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
1757 size = ARRAY_SIZE(saved_regs);
1759 size += ARRAY_SIZE(saved_regs_audigy);
1760 emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size));
1761 if (!emu->saved_ptr)
1763 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1765 if (emu->card_capabilities->ca0151_chip &&
1766 snd_p16v_alloc_pm_buffer(emu) < 0)
1771 static void free_pm_buffer(struct snd_emu10k1 *emu)
1773 vfree(emu->saved_ptr);
1774 snd_emu10k1_efx_free_pm_buffer(emu);
1775 if (emu->card_capabilities->ca0151_chip)
1776 snd_p16v_free_pm_buffer(emu);
1779 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1782 const unsigned char *reg;
1785 val = emu->saved_ptr;
1786 for (reg = saved_regs; *reg != 0xff; reg++)
1787 for (i = 0; i < NUM_G; i++, val++)
1788 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1790 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1791 for (i = 0; i < NUM_G; i++, val++)
1792 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1795 emu->saved_a_iocfg = inw(emu->port + A_IOCFG);
1796 emu->saved_hcfg = inl(emu->port + HCFG);
1799 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1801 if (emu->card_capabilities->ca_cardbus_chip)
1802 snd_emu10k1_cardbus_init(emu);
1803 if (emu->card_capabilities->ecard)
1804 snd_emu10k1_ecard_init(emu);
1805 else if (emu->card_capabilities->emu_model)
1806 snd_emu10k1_emu1010_init(emu);
1808 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1809 snd_emu10k1_init(emu, emu->enable_ir);
1812 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1815 const unsigned char *reg;
1818 snd_emu10k1_audio_enable(emu);
1820 /* resore for spdif */
1822 outw(emu->saved_a_iocfg, emu->port + A_IOCFG);
1823 outl(emu->saved_hcfg, emu->port + HCFG);
1825 val = emu->saved_ptr;
1826 for (reg = saved_regs; *reg != 0xff; reg++)
1827 for (i = 0; i < NUM_G; i++, val++)
1828 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1830 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1831 for (i = 0; i < NUM_G; i++, val++)
1832 snd_emu10k1_ptr_write(emu, *reg, i, *val);