2 * carl9170 firmware - used by the ar9170 wireless device
4 * initialization and main() loop
6 * Copyright (c) 2000-2005 ZyDAS Technology Corporation
7 * Copyright (c) 2007-2009 Atheros Communications, Inc.
8 * Copyright 2009 Johannes Berg <johannes@sipsolutions.net>
9 * Copyright 2009-2011 Christian Lamparter <chunkeey@googlemail.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
36 #define AR9170_WATCH_DOG_TIMER 0x100
38 static void timer_init(const unsigned int timer, const unsigned int interval)
40 /* Set timer to periodic mode */
41 orl(AR9170_TIMER_REG_CONTROL, BIT(timer));
43 /* Set time interval */
44 set(AR9170_TIMER_REG_TIMER0 + (timer << 2), interval - 1);
46 /* Clear timer interrupt flag */
47 orl(AR9170_TIMER_REG_INTERRUPT, BIT(timer));
50 void clock_set(enum cpu_clock_t clock_, bool on)
54 * This setting does more than just mess with the CPU Clock.
55 * So watch out, if you need _stable_ timer interrupts.
57 #ifdef CONFIG_CARL9170FW_RADIO_FUNCTIONS
58 if (fw.phy.frequency < 3000000)
59 set(AR9170_PWR_REG_PLL_ADDAC, 0x5163);
61 set(AR9170_PWR_REG_PLL_ADDAC, 0x5143);
63 set(AR9170_PWR_REG_PLL_ADDAC, 0x5163);
64 #endif /* CONFIG_CARL9170FW_RADIO_FUNCTIONS */
66 fw.ticks_per_usec = GET_VAL(AR9170_PWR_PLL_ADDAC_DIV,
67 get(AR9170_PWR_REG_PLL_ADDAC));
69 set(AR9170_PWR_REG_CLOCK_SEL, (uint32_t) ((on ? 0x70 : 0x600) | clock_));
73 fw.ticks_per_usec >>= 1;
76 fw.ticks_per_usec >>= 1;
82 static void init(void)
86 #ifdef CONFIG_CARL9170FW_DEBUG_UART
88 #endif /* CONFIG_CARL9170FW_DEBUG_UART */
90 /* 25/50/100ms timer (depends on cpu clock) */
96 /* initialize DMA memory */
97 memset(&dma_mem, 0, sizeof(dma_mem));
100 dma_init_descriptors();
102 /* clear all interrupt */
103 set(AR9170_MAC_REG_INT_CTRL, 0xffff);
105 orl(AR9170_MAC_REG_AFTER_PNP, 1);
107 /* Init watch dog control flag */
108 fw.watchdog_enable = 1;
110 set(AR9170_TIMER_REG_WATCH_DOG, AR9170_WATCH_DOG_TIMER);
112 #ifdef CONFIG_CARL9170FW_GPIO_INTERRUPT
113 fw.cached_gpio_state.gpio = get(AR9170_GPIO_REG_PORT_DATA) &
115 #endif /* CONFIG_CARL9170FW_GPIO_INTERRUPT */
117 /* this will get the downqueue moving. */
121 static void handle_fw(void)
123 if (fw.watchdog_enable == 1)
124 set(AR9170_TIMER_REG_WATCH_DOG, AR9170_WATCH_DOG_TIMER);
130 static void timer0_isr(void)
134 #ifdef CONFIG_CARL9170FW_GPIO_INTERRUPT
136 #endif /* CONFIG_CARL9170FW_GPIO_INTERRUPT */
138 #ifdef CONFIG_CARL9170FW_DEBUG_LED_HEARTBEAT
139 set(AR9170_GPIO_REG_PORT_DATA, get(AR9170_GPIO_REG_PORT_DATA) ^ 1);
140 #endif /* CONFIG_CARL9170FW_DEBUG_LED_HEARTBEAT */
143 static void handle_timer(void)
147 intr = get(AR9170_TIMER_REG_INTERRUPT);
149 /* ACK timer interrupt */
150 set(AR9170_TIMER_REG_INTERRUPT, intr);
152 #define HANDLER(intr, flag, func) \
154 if ((intr & flag) != 0) { \
160 HANDLER(intr, BIT(0), timer0_isr);
163 DBG("Unhandled Timer Event %x", (unsigned int) intr);
168 static void tally_update(void)
170 unsigned int boff, time, delta;
172 time = get_clock_counter();
173 if (fw.phy.state == CARL9170_PHY_ON) {
174 delta = (time - fw.tally_clock);
176 fw.tally.active += delta;
178 boff = get(AR9170_MAC_REG_BACKOFF_STATUS);
179 if (boff & AR9170_MAC_BACKOFF_TX_PE)
180 fw.tally.tx_time += delta;
181 if (boff & AR9170_MAC_BACKOFF_CCA)
182 fw.tally.cca += delta;
185 fw.tally_clock = time;
189 static void radar_pattern_generator(void)
191 if (fw.phy.state == CARL9170_PHY_ON) {
192 if (fw.wlan.soft_radar == NO_RADAR ||
193 fw.wlan.soft_radar >= __CARL9170FW_NUM_RADARS)
196 const struct radar_info *radar = &radars[fw.wlan.soft_radar];
197 if (radar->pulses >= fw.wlan.pattern_index) {
198 fw.wlan.pattern_index = 0;
201 if (radar->pulses > fw.wlan.pattern_index) {
202 const struct radar_info_pattern *pattern = &radar->pattern[fw.wlan.pattern_index];
203 if (is_after_usecs(fw.wlan.radar_last, pattern->pulse_interval)) {
204 fw.wlan.radar_last = get_clock_counter();
205 //set(PATTERN, pattern->pulse_pattern);
206 //set(MODE, pattern->pulse_mode);
207 udelay(pattern->pulse_width);
208 //set(MODE, ~pattern->pulse_mode);
209 fw.wlan.pattern_index++;
215 static void __noreturn main_loop(void)
222 * Due to frame order persevation, the wlan subroutines
223 * must be executed before handle_host_interface.
227 handle_host_interface();
235 radar_pattern_generator();
240 * The bootcode will work with the device driver to load the firmware
241 * onto the device's Program SRAM. The Program SRAM has a size of 16 KB
242 * and also contains the stack, which grows down from 0x204000.
244 * The Program SRAM starts at address 0x200000 on the device.
245 * The firmware entry point (0x200004) is located in boot.S.
246 * we put _start() there with the linker script carl9170.lds.
249 void __section(boot) start(void)
251 clock_set(AHB_40MHZ_OSC, true);
253 /* watchdog magic pattern check */
254 if ((get(AR9170_PWR_REG_WATCH_DOG_MAGIC) & 0xffff0000) == 0x12340000) {
255 /* watch dog warm start */
256 incl(AR9170_PWR_REG_WATCH_DOG_MAGIC);
258 } else if ((get(AR9170_PWR_REG_WATCH_DOG_MAGIC) & 0xffff0000) == 0x98760000) {
262 /* write the magic pattern for watch dog */
263 andl(AR9170_PWR_REG_WATCH_DOG_MAGIC, 0xFFFF);
264 orl(AR9170_PWR_REG_WATCH_DOG_MAGIC, 0x12340000);
268 #ifdef CONFIG_CARL9170FW_DEBUG
271 BUG_ON(0x2b || !0x2b);
272 INFO("INFO MESSAGE");
274 /* a set of unique characters to detect transfer data corruptions */
275 DBG("AaBbCcDdEeFfGgHhIiJjKkLlMmNnOoPpQqRrSsTtUuVvWwXxYyZz"
276 " ~`!1@2#3$4%%5^6&7*8(9)0_-+={[}]|\\:;\"'<,>.?/");
277 #endif /* CONFIG_CARL9170FW_DEBUG */
280 * Tell the host, that the firmware has booted and is
281 * now ready to process requests.
283 send_cmd_to_host(0, CARL9170_RSP_BOOT, 0x00, NULL);