2 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2008 Luotao Fu, kernel@pengutronix.de
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/clk.h>
16 #include <linux/delay.h>
18 #include <linux/ktime.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
25 * MXC W1 Register offsets
27 #define MXC_W1_CONTROL 0x00
28 # define MXC_W1_CONTROL_RDST BIT(3)
29 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
30 # define MXC_W1_CONTROL_PST BIT(6)
31 # define MXC_W1_CONTROL_RPP BIT(7)
32 #define MXC_W1_TIME_DIVIDER 0x02
33 #define MXC_W1_RESET 0x04
34 # define MXC_W1_RESET_RST BIT(0)
36 struct mxc_w1_device {
39 struct w1_bus_master bus_master;
43 * this is the low level routine to
44 * reset the device on the One Wire interface
47 static u8 mxc_w1_ds2_reset_bus(void *data)
49 struct mxc_w1_device *dev = data;
52 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL);
54 /* Wait for reset sequence 511+512us, use 1500us for sure */
55 timeout = ktime_add_us(ktime_get(), 1500);
60 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL);
62 /* PST bit is valid after the RPP bit is self-cleared */
63 if (!(ctrl & MXC_W1_CONTROL_RPP))
64 return !(ctrl & MXC_W1_CONTROL_PST);
65 } while (ktime_before(ktime_get(), timeout));
71 * this is the low level routine to read/write a bit on the One Wire
72 * interface on the hardware. It does write 0 if parameter bit is set
73 * to 0, otherwise a write 1/read.
75 static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit)
77 struct mxc_w1_device *dev = data;
80 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL);
82 /* Wait for read/write bit (60us, Max 120us), use 200us for sure */
83 timeout = ktime_add_us(ktime_get(), 200);
88 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL);
90 /* RDST bit is valid after the WR1/RD bit is self-cleared */
91 if (!(ctrl & MXC_W1_CONTROL_WR(bit)))
92 return !!(ctrl & MXC_W1_CONTROL_RDST);
93 } while (ktime_before(ktime_get(), timeout));
98 static int mxc_w1_probe(struct platform_device *pdev)
100 struct mxc_w1_device *mdev;
101 unsigned long clkrate;
102 struct resource *res;
106 mdev = devm_kzalloc(&pdev->dev, sizeof(struct mxc_w1_device),
111 mdev->clk = devm_clk_get(&pdev->dev, NULL);
112 if (IS_ERR(mdev->clk))
113 return PTR_ERR(mdev->clk);
115 err = clk_prepare_enable(mdev->clk);
119 clkrate = clk_get_rate(mdev->clk);
120 if (clkrate < 10000000)
122 "Low clock frequency causes improper function\n");
124 clkdiv = DIV_ROUND_CLOSEST(clkrate, 1000000);
126 if ((clkrate < 980000) || (clkrate > 1020000))
128 "Incorrect time base frequency %lu Hz\n", clkrate);
130 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
131 mdev->regs = devm_ioremap_resource(&pdev->dev, res);
132 if (IS_ERR(mdev->regs)) {
133 err = PTR_ERR(mdev->regs);
134 goto out_disable_clk;
137 /* Software reset 1-Wire module */
138 writeb(MXC_W1_RESET_RST, mdev->regs + MXC_W1_RESET);
139 writeb(0, mdev->regs + MXC_W1_RESET);
141 writeb(clkdiv - 1, mdev->regs + MXC_W1_TIME_DIVIDER);
143 mdev->bus_master.data = mdev;
144 mdev->bus_master.reset_bus = mxc_w1_ds2_reset_bus;
145 mdev->bus_master.touch_bit = mxc_w1_ds2_touch_bit;
147 platform_set_drvdata(pdev, mdev);
149 err = w1_add_master_device(&mdev->bus_master);
151 goto out_disable_clk;
156 clk_disable_unprepare(mdev->clk);
161 * disassociate the w1 device from the driver
163 static int mxc_w1_remove(struct platform_device *pdev)
165 struct mxc_w1_device *mdev = platform_get_drvdata(pdev);
167 w1_remove_master_device(&mdev->bus_master);
169 clk_disable_unprepare(mdev->clk);
174 static const struct of_device_id mxc_w1_dt_ids[] = {
175 { .compatible = "fsl,imx21-owire" },
178 MODULE_DEVICE_TABLE(of, mxc_w1_dt_ids);
180 static struct platform_driver mxc_w1_driver = {
183 .of_match_table = mxc_w1_dt_ids,
185 .probe = mxc_w1_probe,
186 .remove = mxc_w1_remove,
188 module_platform_driver(mxc_w1_driver);
190 MODULE_LICENSE("GPL");
191 MODULE_AUTHOR("Freescale Semiconductors Inc");
192 MODULE_DESCRIPTION("Driver for One-Wire on MXC");