2 * Copyright 2012 Freescale Semiconductor, Inc.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include <linux/err.h>
13 #include <linux/init.h>
15 #include <linux/module.h>
17 #include <linux/of_address.h>
18 #include <linux/pinctrl/machine.h>
19 #include <linux/pinctrl/pinconf.h>
20 #include <linux/pinctrl/pinctrl.h>
21 #include <linux/pinctrl/pinmux.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
25 #include "pinctrl-mxs.h"
29 struct mxs_pinctrl_data {
31 struct pinctrl_dev *pctl;
33 struct mxs_pinctrl_soc_data *soc;
36 static int mxs_get_groups_count(struct pinctrl_dev *pctldev)
38 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
40 return d->soc->ngroups;
43 static const char *mxs_get_group_name(struct pinctrl_dev *pctldev,
46 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
48 return d->soc->groups[group].name;
51 static int mxs_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
52 const unsigned **pins, unsigned *num_pins)
54 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
56 *pins = d->soc->groups[group].pins;
57 *num_pins = d->soc->groups[group].npins;
62 static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
65 seq_printf(s, " %s", dev_name(pctldev->dev));
68 static int mxs_dt_node_to_map(struct pinctrl_dev *pctldev,
69 struct device_node *np,
70 struct pinctrl_map **map, unsigned *num_maps)
72 struct pinctrl_map *new_map;
75 unsigned long config = 0;
76 unsigned long *pconfig;
77 int length = strlen(np->name) + SUFFIX_LEN;
82 /* Check for pin config node which has no 'reg' property */
83 if (of_property_read_u32(np, "reg", ®))
86 ret = of_property_read_u32(np, "fsl,drive-strength", &val);
88 config = val | MA_PRESENT;
89 ret = of_property_read_u32(np, "fsl,voltage", &val);
91 config |= val << VOL_SHIFT | VOL_PRESENT;
92 ret = of_property_read_u32(np, "fsl,pull-up", &val);
94 config |= val << PULL_SHIFT | PULL_PRESENT;
96 /* Check for group node which has both mux and config settings */
97 if (!purecfg && config)
100 new_map = kzalloc(sizeof(*new_map) * new_num, GFP_KERNEL);
105 new_map[i].type = PIN_MAP_TYPE_MUX_GROUP;
106 new_map[i].data.mux.function = np->name;
108 /* Compose group name */
109 group = kzalloc(length, GFP_KERNEL);
114 snprintf(group, length, "%s.%d", np->name, reg);
115 new_map[i].data.mux.group = group;
120 pconfig = kmemdup(&config, sizeof(config), GFP_KERNEL);
126 new_map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
127 new_map[i].data.configs.group_or_pin = purecfg ? np->name :
129 new_map[i].data.configs.configs = pconfig;
130 new_map[i].data.configs.num_configs = 1;
146 static void mxs_dt_free_map(struct pinctrl_dev *pctldev,
147 struct pinctrl_map *map, unsigned num_maps)
151 for (i = 0; i < num_maps; i++) {
152 if (map[i].type == PIN_MAP_TYPE_MUX_GROUP)
153 kfree(map[i].data.mux.group);
154 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
155 kfree(map[i].data.configs.configs);
161 static const struct pinctrl_ops mxs_pinctrl_ops = {
162 .get_groups_count = mxs_get_groups_count,
163 .get_group_name = mxs_get_group_name,
164 .get_group_pins = mxs_get_group_pins,
165 .pin_dbg_show = mxs_pin_dbg_show,
166 .dt_node_to_map = mxs_dt_node_to_map,
167 .dt_free_map = mxs_dt_free_map,
170 static int mxs_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
172 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
174 return d->soc->nfunctions;
177 static const char *mxs_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
180 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
182 return d->soc->functions[function].name;
185 static int mxs_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
187 const char * const **groups,
188 unsigned * const num_groups)
190 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
192 *groups = d->soc->functions[group].groups;
193 *num_groups = d->soc->functions[group].ngroups;
198 static void mxs_pinctrl_rmwl(u32 value, u32 mask, u8 shift, void __iomem *reg)
203 tmp &= ~(mask << shift);
204 tmp |= value << shift;
208 static int mxs_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
211 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
212 struct mxs_group *g = &d->soc->groups[group];
218 for (i = 0; i < g->npins; i++) {
219 bank = PINID_TO_BANK(g->pins[i]);
220 pin = PINID_TO_PIN(g->pins[i]);
221 reg = d->base + d->soc->regs->muxsel;
222 reg += bank * 0x20 + pin / 16 * 0x10;
223 shift = pin % 16 * 2;
225 mxs_pinctrl_rmwl(g->muxsel[i], 0x3, shift, reg);
231 static const struct pinmux_ops mxs_pinmux_ops = {
232 .get_functions_count = mxs_pinctrl_get_funcs_count,
233 .get_function_name = mxs_pinctrl_get_func_name,
234 .get_function_groups = mxs_pinctrl_get_func_groups,
235 .set_mux = mxs_pinctrl_set_mux,
238 static int mxs_pinconf_get(struct pinctrl_dev *pctldev,
239 unsigned pin, unsigned long *config)
244 static int mxs_pinconf_set(struct pinctrl_dev *pctldev,
245 unsigned pin, unsigned long *configs,
246 unsigned num_configs)
251 static int mxs_pinconf_group_get(struct pinctrl_dev *pctldev,
252 unsigned group, unsigned long *config)
254 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
256 *config = d->soc->groups[group].config;
261 static int mxs_pinconf_group_set(struct pinctrl_dev *pctldev,
262 unsigned group, unsigned long *configs,
263 unsigned num_configs)
265 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
266 struct mxs_group *g = &d->soc->groups[group];
268 u8 ma, vol, pull, bank, shift;
272 unsigned long config;
274 for (n = 0; n < num_configs; n++) {
277 ma = CONFIG_TO_MA(config);
278 vol = CONFIG_TO_VOL(config);
279 pull = CONFIG_TO_PULL(config);
281 for (i = 0; i < g->npins; i++) {
282 bank = PINID_TO_BANK(g->pins[i]);
283 pin = PINID_TO_PIN(g->pins[i]);
286 reg = d->base + d->soc->regs->drive;
287 reg += bank * 0x40 + pin / 8 * 0x10;
290 if (config & MA_PRESENT) {
292 mxs_pinctrl_rmwl(ma, 0x3, shift, reg);
296 if (config & VOL_PRESENT) {
297 shift = pin % 8 * 4 + 2;
299 writel(1 << shift, reg + SET);
301 writel(1 << shift, reg + CLR);
305 if (config & PULL_PRESENT) {
306 reg = d->base + d->soc->regs->pull;
310 writel(1 << shift, reg + SET);
312 writel(1 << shift, reg + CLR);
316 /* cache the config value for mxs_pinconf_group_get() */
319 } /* for each config */
324 static void mxs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
325 struct seq_file *s, unsigned pin)
330 static void mxs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
331 struct seq_file *s, unsigned group)
333 unsigned long config;
335 if (!mxs_pinconf_group_get(pctldev, group, &config))
336 seq_printf(s, "0x%lx", config);
339 static const struct pinconf_ops mxs_pinconf_ops = {
340 .pin_config_get = mxs_pinconf_get,
341 .pin_config_set = mxs_pinconf_set,
342 .pin_config_group_get = mxs_pinconf_group_get,
343 .pin_config_group_set = mxs_pinconf_group_set,
344 .pin_config_dbg_show = mxs_pinconf_dbg_show,
345 .pin_config_group_dbg_show = mxs_pinconf_group_dbg_show,
348 static struct pinctrl_desc mxs_pinctrl_desc = {
349 .pctlops = &mxs_pinctrl_ops,
350 .pmxops = &mxs_pinmux_ops,
351 .confops = &mxs_pinconf_ops,
352 .owner = THIS_MODULE,
355 static int mxs_pinctrl_parse_group(struct platform_device *pdev,
356 struct device_node *np, int idx,
357 const char **out_name)
359 struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);
360 struct mxs_group *g = &d->soc->groups[idx];
361 struct property *prop;
362 const char *propname = "fsl,pinmux-ids";
364 int length = strlen(np->name) + SUFFIX_LEN;
367 group = devm_kzalloc(&pdev->dev, length, GFP_KERNEL);
370 if (of_property_read_u32(np, "reg", &val))
371 snprintf(group, length, "%s", np->name);
373 snprintf(group, length, "%s.%d", np->name, val);
376 prop = of_find_property(np, propname, &length);
379 g->npins = length / sizeof(u32);
381 g->pins = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->pins),
386 g->muxsel = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->muxsel),
391 of_property_read_u32_array(np, propname, g->pins, g->npins);
392 for (i = 0; i < g->npins; i++) {
393 g->muxsel[i] = MUXID_TO_MUXSEL(g->pins[i]);
394 g->pins[i] = MUXID_TO_PINID(g->pins[i]);
403 static int mxs_pinctrl_probe_dt(struct platform_device *pdev,
404 struct mxs_pinctrl_data *d)
406 struct mxs_pinctrl_soc_data *soc = d->soc;
407 struct device_node *np = pdev->dev.of_node;
408 struct device_node *child;
409 struct mxs_function *f;
410 const char *gpio_compat = "fsl,mxs-gpio";
411 const char *fn, *fnull = "";
412 int i = 0, idxf = 0, idxg = 0;
416 child = of_get_next_child(np, NULL);
418 dev_err(&pdev->dev, "no group is defined\n");
422 /* Count total functions and groups */
424 for_each_child_of_node(np, child) {
425 if (of_device_is_compatible(child, gpio_compat))
428 /* Skip pure pinconf node */
429 if (of_property_read_u32(child, "reg", &val))
431 if (strcmp(fn, child->name)) {
437 soc->functions = devm_kzalloc(&pdev->dev, soc->nfunctions *
438 sizeof(*soc->functions), GFP_KERNEL);
442 soc->groups = devm_kzalloc(&pdev->dev, soc->ngroups *
443 sizeof(*soc->groups), GFP_KERNEL);
447 /* Count groups for each function */
449 f = &soc->functions[idxf];
450 for_each_child_of_node(np, child) {
451 if (of_device_is_compatible(child, gpio_compat))
453 if (of_property_read_u32(child, "reg", &val))
455 if (strcmp(fn, child->name)) {
456 struct device_node *child2;
459 * This reference is dropped by
460 * of_get_next_child(np, * child)
465 * The logic parsing the functions from dt currently
466 * doesn't handle if functions with the same name are
467 * not grouped together. Only the first contiguous
468 * cluster is usable for each function name. This is a
469 * bug that is not trivial to fix, but at least warn
472 for (child2 = of_get_next_child(np, child);
474 child2 = of_get_next_child(np, child2)) {
475 if (!strcmp(child2->name, fn))
477 "function nodes must be grouped by name (failed for: %s)",
481 f = &soc->functions[idxf++];
482 f->name = fn = child->name;
487 /* Get groups for each function */
490 for_each_child_of_node(np, child) {
491 if (of_device_is_compatible(child, gpio_compat))
493 if (of_property_read_u32(child, "reg", &val)) {
494 ret = mxs_pinctrl_parse_group(pdev, child,
501 if (strcmp(fn, child->name)) {
502 f = &soc->functions[idxf++];
503 f->groups = devm_kzalloc(&pdev->dev, f->ngroups *
511 ret = mxs_pinctrl_parse_group(pdev, child, idxg++,
520 int mxs_pinctrl_probe(struct platform_device *pdev,
521 struct mxs_pinctrl_soc_data *soc)
523 struct device_node *np = pdev->dev.of_node;
524 struct mxs_pinctrl_data *d;
527 d = devm_kzalloc(&pdev->dev, sizeof(*d), GFP_KERNEL);
534 d->base = of_iomap(np, 0);
536 return -EADDRNOTAVAIL;
538 mxs_pinctrl_desc.pins = d->soc->pins;
539 mxs_pinctrl_desc.npins = d->soc->npins;
540 mxs_pinctrl_desc.name = dev_name(&pdev->dev);
542 platform_set_drvdata(pdev, d);
544 ret = mxs_pinctrl_probe_dt(pdev, d);
546 dev_err(&pdev->dev, "dt probe failed: %d\n", ret);
550 d->pctl = pinctrl_register(&mxs_pinctrl_desc, &pdev->dev, d);
551 if (IS_ERR(d->pctl)) {
552 dev_err(&pdev->dev, "Couldn't register MXS pinctrl driver\n");
553 ret = PTR_ERR(d->pctl);
563 EXPORT_SYMBOL_GPL(mxs_pinctrl_probe);
565 int mxs_pinctrl_remove(struct platform_device *pdev)
567 struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);
569 pinctrl_unregister(d->pctl);
574 EXPORT_SYMBOL_GPL(mxs_pinctrl_remove);