2 * intel_pmic_crc.c - Intel CrystalCove PMIC operation region driver
4 * Copyright (C) 2014 Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License version
8 * 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/init.h>
17 #include <linux/acpi.h>
18 #include <linux/mfd/intel_soc_pmic.h>
19 #include <linux/regmap.h>
20 #include <linux/platform_device.h>
21 #include "intel_pmic.h"
23 #define PWR_SOURCE_SELECT BIT(1)
25 #define PMIC_A0LOCK_REG 0xc5
27 static struct pmic_table power_table[] = {
37 }, /* SYSX -> VSYS_SX */
42 }, /* SYSU -> VSYS_U */
47 }, /* SYSS -> VSYS_S */
52 }, /* V50S -> V5P0S */
57 }, /* HOST -> VHOST, USB2/3 host */
62 }, /* VBUS -> VBUS, USB2/3 OTG */
67 }, /* HDMI -> VHDMI */
77 }, /* X285 -> V2P85SX, camera */
87 }, /* V33S -> V3P3S, display/ssd/audio */
92 }, /* V33U -> V3P3U, SDIO wifi&bt */
94 .address = 0x34 .. 0x40,
97 }, ** V33I, V18A, REFQ, V12A */
102 }, /* V18S -> V1P8S, SOC/USB PHY/SIM */
107 }, /* V18X -> V1P8SX, eMMC/camara/audio */
112 }, /* V18U -> V1P8U, LPDDR */
117 }, /* V12X -> V1P2SX, SOC SFR */
122 }, /* V12S -> V1P2S, MIPI */
132 }, /* V10S -> V1P0S, SOC GFX */
137 }, /* V10X -> V1P0SX, SOC display/DDR IO/PCIe */
142 }, /* V105 -> V1P05S, L2 SRAM */
145 static struct pmic_table thermal_table[] = {
196 static int intel_crc_pmic_get_power(struct regmap *regmap, int reg,
201 if (regmap_read(regmap, reg, &data))
204 *value = (data & PWR_SOURCE_SELECT) && (data & BIT(bit)) ? 1 : 0;
208 static int intel_crc_pmic_update_power(struct regmap *regmap, int reg,
213 if (regmap_read(regmap, reg, &data))
217 data |= PWR_SOURCE_SELECT | BIT(bit);
220 data |= PWR_SOURCE_SELECT;
223 if (regmap_write(regmap, reg, data))
228 static int intel_crc_pmic_get_raw_temp(struct regmap *regmap, int reg)
233 * Raw temperature value is 10bits: 8bits in reg
234 * and 2bits in reg-1: bit0,1
236 if (regmap_read(regmap, reg, &temp_l) ||
237 regmap_read(regmap, reg - 1, &temp_h))
240 return temp_l | (temp_h & 0x3) << 8;
243 static int intel_crc_pmic_update_aux(struct regmap *regmap, int reg, int raw)
245 return regmap_write(regmap, reg, raw) ||
246 regmap_update_bits(regmap, reg - 1, 0x3, raw >> 8) ? -EIO : 0;
249 static int intel_crc_pmic_get_policy(struct regmap *regmap,
250 int reg, int bit, u64 *value)
254 if (regmap_read(regmap, reg, &pen))
260 static int intel_crc_pmic_update_policy(struct regmap *regmap,
261 int reg, int bit, int enable)
265 /* Update to policy enable bit requires unlocking a0lock */
266 if (regmap_read(regmap, PMIC_A0LOCK_REG, &alert0))
269 if (regmap_update_bits(regmap, PMIC_A0LOCK_REG, 0x01, 0))
272 if (regmap_update_bits(regmap, reg, 0x80, enable << 7))
276 if (regmap_write(regmap, PMIC_A0LOCK_REG, alert0))
282 static struct intel_pmic_opregion_data intel_crc_pmic_opregion_data = {
283 .get_power = intel_crc_pmic_get_power,
284 .update_power = intel_crc_pmic_update_power,
285 .get_raw_temp = intel_crc_pmic_get_raw_temp,
286 .update_aux = intel_crc_pmic_update_aux,
287 .get_policy = intel_crc_pmic_get_policy,
288 .update_policy = intel_crc_pmic_update_policy,
289 .power_table = power_table,
290 .power_table_count= ARRAY_SIZE(power_table),
291 .thermal_table = thermal_table,
292 .thermal_table_count = ARRAY_SIZE(thermal_table),
295 static int intel_crc_pmic_opregion_probe(struct platform_device *pdev)
297 struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
298 return intel_pmic_install_opregion_handler(&pdev->dev,
299 ACPI_HANDLE(pdev->dev.parent), pmic->regmap,
300 &intel_crc_pmic_opregion_data);
303 static struct platform_driver intel_crc_pmic_opregion_driver = {
304 .probe = intel_crc_pmic_opregion_probe,
306 .name = "crystal_cove_pmic",
309 builtin_platform_driver(intel_crc_pmic_opregion_driver);