2 * fw/board_rzusb.c - RZUSB Board-specific functions (for boot loader and application)
4 * Written 2016 by Stefan Schmidt
5 * Copyright 2016 Stefan Schmidt
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
18 #include <avr/interrupt.h>
21 #define F_CPU 8000000UL
22 #include <util/delay.h>
25 #include "at86rf230.h"
30 static bool spi_initialized = 0;
34 /* set up all the outputs; default port value is 0 */
44 OUT(nRST_RF); /* this also resets the transceiver */
49 /* AT86RF231 data sheet, 12.4.13, reset pulse width: 625 ns (min) */
55 /* 12.4.14: SPI access latency after reset: 625 ns (min) */
59 /* we must restore TRX_CTRL_0 after each reset (9.6.4) */
74 /* switch CLKM to 8 MHz */
77 * @@@ Note: Atmel advise against changing the external clock in
78 * mid-flight. We should therefore switch to the RC clock first, then
79 * crank up the external clock, and finally switch back to the external
80 * clock. The clock switching procedure is described in the ATmega32U2
81 * data sheet in secton 8.2.2.
84 spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
88 /* TX_AUTO_CRC_ON, default disabled */
90 spi_send(AT86RF230_REG_WRITE | 0x05);
97 /* Disable the watchdog timer */
99 MCUSR = 0; /* Remove override */
100 WDTCSR |= 1 << WDCE; /* Enable change */
101 WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling
105 /* We start with a 16 MHz/8 clock. Put the prescaler to 2. */
113 if (!spi_initialized)
132 SPCR = (1 << SPE) | (1 << MSTR);
140 USBCON |= 1 << FRZCLK; /* freeze the clock */
142 /* enable the PLL and wait for it to lock */
143 /* TODO sheet page 50 For Atmel AT90USB128x only. Do not use with Atmel AT90USB64x. */
144 /* FOR 8 XTAL Mhz only!!! */
145 PLLCSR = ((1 << PLLP1) | (1 << PLLP0));
147 while (!(PLLCSR & (1 << PLOCK)));
149 UHWCON |= (1 << UVREGE);
151 USBCON &= ~((1 << USBE) | (1 << OTGPADE)); /* reset the controller */
152 USBCON |= ((1 << USBE) | (1 << OTGPADE));
154 USBCON &= ~(1 << FRZCLK); /* thaw the clock */
156 UDCON &= ~(1 << DETACH); /* attach the pull-up */
157 UDIEN = 1 << EORSTE; /* enable device interrupts */
158 // UDCON |= 1 << RSTCPU; /* reset CPU on bus reset */
163 void board_app_init(void)
165 /* enable timer input capture 1, trigger on rising edge */
166 TCCR1B = (1 << ICES1);
168 TIMSK1 = (1 << ICIE1);