2 * fw/board_hulusb.c - Busware HUL Board-specific functions (for boot loader and application)
4 * Written 2017 by Filzmaier Josef
5 * Based on fw/board_rzusb written and Copyright 2016 Stefan Schmidt
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
18 #include <avr/interrupt.h>
21 #define F_CPU 8000000UL
22 #include <util/delay.h>
25 #include "at86rf230.h"
30 static bool spi_initialized = 0;
34 /* set up all the outputs; default port value is 0 */
45 SET(LED_RED); /* Leds are active low on HULUSB board */
46 CLR(LED_GREEN); /* Green Led indicates the dongle is running */
47 OUT(nRST_RF); /* this also resets the transceiver */
52 /* AT86RF212 data sheet, Appendix B, p166 Power-On Reset procedure */
53 /*-----------------------------------------------------------------*/
63 /* 5.1.4.5: Wait t10: 625 ns (min) */
67 reg_write(REG_TRX_CTRL_0, 0x19);
69 change_state(TRX_CMD_FORCE_TRX_OFF);
70 /*-----------------------------------------------------------------*/
72 /* we must restore TRX_CTRL_0 after each reset (7.7.4) */
77 void led_red(bool on) {
84 void led_green(bool on) {
98 /* CLKM is not connected on BUSWARE HUL and therefore it is running in
100 reg_write(REG_TRX_CTRL_0, 0x00);
102 /* TX_AUTO_CRC_ON, default disabled */
103 subreg_write(SR_TX_AUTO_CRC_ON, 1);
106 void board_init(void)
108 /* Disable the watchdog timer */
110 MCUSR = 0; /* Remove override */
111 WDTCSR |= 1 << WDCE; /* Enable change */
112 WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling
116 /* We start with a 16 MHz/8 clock. Put the prescaler to 2. */
124 if (!spi_initialized)
143 SPCR = (1 << SPE) | (1 << MSTR);
151 USBCON |= 1 << FRZCLK; /* freeze the clock */
153 /* enable the PLL and wait for it to lock */
154 /* TODO sheet page 50 For Atmel AT90USB128x only. Do not use with Atmel AT90USB64x. */
155 /* FOR 8 XTAL Mhz only!!! */
156 PLLCSR = ((1 << PLLP1) | (1 << PLLP0));
158 while (!(PLLCSR & (1 << PLOCK)));
160 UHWCON |= (1 << UVREGE);
162 USBCON &= ~((1 << USBE) | (1 << OTGPADE)); /* reset the controller */
163 USBCON |= ((1 << USBE) | (1 << OTGPADE));
165 USBCON &= ~(1 << FRZCLK); /* thaw the clock */
167 UDCON &= ~(1 << DETACH); /* attach the pull-up */
168 UDIEN = 1 << EORSTE; /* enable device interrupts */
169 // UDCON |= 1 << RSTCPU; /* reset CPU on bus reset */
174 void board_app_init(void)
176 /* enable INT0, trigger on rising edge */
177 EICRA = 1 << ISC01 | 1 << ISC00;